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參數(shù)資料
| 型號(hào)： | HI5667 |
| 廠商： | Intersil Corporation |
| 英文描述： | 8-Bit, 60MSPS A/D Converter with Internal Voltage Reference |
| 中文描述： | 8位，60MSPS的A / D轉(zhuǎn)換器內(nèi)部電壓基準(zhǔn) |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 262K |
| 代理商： | HI5667 |
5
Reference Temperature Coefficient
REFERENCE VOLTAGE INPUT
Reference Voltage Input, V
REFIN
Total Reference Resistance, R
REFIN
Reference Input Current, I
REFIN
DC BIAS VOLTAGE
DC Bias Voltage Output, V
DC
Maximum Output Current
DIGITAL INPUTS
Input Logic High Voltage, V
IH
Input Logic Low Voltage, V
IL
Input Logic High Current, I
IH
Input Logic Low Current, I
IL
Input Capacitance, C
IN
DIGITAL OUTPUTS
Output Logic High Voltage, V
OH
Output Logic Low Voltage, V
OL
Output Three-State Leakage Current, I
OZ
Output Logic High Voltage, V
OH
Output Logic Low Voltage, V
OL
Output Three-State Leakage Current, I
OZ
Output Capacitance, C
OUT
TIMING CHARACTERISTICS
Aperture Delay, t
AP
Aperture Jitter, t
AJ
Data Output Hold, t
H
Data Output Delay, t
OD
Data Output Enable Time, t
EN
Data Output Enable Time, t
DIS
Data Latency, t
LAT
Power-Up Initialization
Sample Clock Pulse Width (Low)
Sample Clock Pulse Width (High)
Sample Clock Duty Cycle Variation
POWER SUPPLY CHARACTERISTICS
Analog Supply Voltage, AV
CC
Digital Supply Voltage, DV
CC1
Digital Output Supply Voltage, DV
CC2
-
120
-
ppm/
o
C
-
-
-
2.5
2.5
1
-
-
-
V
k
mA
-
-
3.0
-
-
V
0.2
mA
CLK, DFS, OE
CLK, DFS, OE
CLK, DFS, OE, V
IH
= 5V
CLK, DFS, OE, V
IL
= 0V
2.0
-
-10.0
-10.0
-
-
-
-
-
7
-
V
V
μ
A
μ
A
pF
0.8
+10.0
+10.0
-
I
OH
= 100
μ
A; DV
CC2
= 5V
I
OL
= 100
μ
A; DV
CC2
= 5V
V
O
= 0/5V; DV
CC2
= 5V
I
OH
= 100
μ
A; DV
CC2
= 3V
I
OL
= 100
μ
A; DV
CC2
= 3V
V
O
= 0/5V; DV
CC2
= 3V
4.0
-
-10
2.4
-
-10
-
-
-
-
V
V
μ
A
V
V
μ
A
pF
0.8
10
-
0.5
10
-
±
1
-
-
±
1
10
-
-
-
-
-
-
-
-
5
5
5
6
5
5
-
-
-
-
-
-
-
-
7
ns
ps
RMS
ns
ns
ns
ns
Cycles
Cycles
ns
ns
%
For a Valid Sample (Note 2)
Data Invalid Time (Note 2)
f
S
= 60MSPS
f
S
= 60MSPS
f
S
= 60MSPS
20
-
-
-
7.5
7.5
-
8.33
8.33
±
5
4.75
4.75
2.7
4.75
-
-
-
-
-
-
-
5.0
5.0
3.0
5.0
70
47
21
2
346
±
0.175
±
0.025
5.25
5.25
3.3
5.25
92
63
25
4
452
-
-
V
V
V
V
At 3.0V
At 5.0V
f
IN
= 10MHz and DFS = “0”
f
IN
= 10MHz and DFS = “0”
f
IN
= 10MHz and DFS = “0”
f
IN
= 10MHz and DFS = “0”
f
IN
= 10MHz and DFS = “0”
AV
CC
or DV
CC
= 5V
±
5%
AV
CC
or DV
CC
= 5V
±
5%
Total Supply Current, I
CC
Analog Supply Current, AI
CC
Digital Supply Current, DI
CC
Output Supply Current, DI
CC2
Power Dissipation
Offset Error Sensitivity,
V
OS
Gain Error Sensitivity,
FSE
NOTES:
2. Parameter guaranteed by design or characterization and not production tested.
3. With the clock low and DC input.
mA
mA
mA
mA
mW
LSB
LSB
Electrical Specifications
AV
CC
= DV
CC1
= 5.0V, DV
CC2
= 3.0V; V
REFIN
= V
REFOUT
; f
S
= 60MSPS at 50% Duty Cycle;
C
L
= 10pF; T
A
= 25
o
C; Differential Analog Input; Typical Values are Test Results at 25
o
C,
Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
HI5667
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