All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certificatio" />
參數(shù)資料
型號: HI5660IBZ
廠商: Intersil
文件頁數(shù): 9/9頁
文件大?。?/td> 0K
描述: CONV D/A 8-BIT 125MSPS 28-SOIC
產(chǎn)品培訓(xùn)模塊: Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝: 260
設(shè)置時間: 15ns
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 模擬和數(shù)字
功率耗散(最大): 165mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 28-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 28-SOIC W
包裝: 管件
輸出數(shù)目和類型: 2 電流,單極
采樣率(每秒): 125M
9
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
Pin Descriptions
PIN NO.
PIN NAME
PIN DESCRIPTION
1-8
D7 (MSB) Through
D0 (LSB)
Digital Data Bit 7 (Most Significant Bit) through Digital Data Bit 0, (Least Significant Bit).
9-14
DCOM
Connect to digital ground.
15
SLEEP
Control Pin for Power-Down mode. Sleep Mode is active high; Connect to ground for Normal Mode. Sleep
pin has internal 20
A active pulldown current.
16
REFLO
Connect to analog ground to enable internal 1.2V reference or connect to AVDD to disable internal
reference.
17
REFIO
Reference voltage input if internal reference is disabled. Reference voltage output if internal reference is
enabled. Use 0.1
F cap to ground when internal reference is enabled.
18
FSADJ
Full Scale Current Adjust. Use a resistor to ground to adjust full scale output current. Full Scale Output
Current = 32 x VFSADJ/RSET.
19
COMP1
For use in reducing bandwidth/noise. Recommended: connect 0.1
F to AVDD.
20
ACOM
Analog Ground.
21
IOUTB
The complimentary current output of the device. Full scale output current is achieved when all input bits
are set to binary 0.
22
IOUTA
Current output of the device. Full scale output current is achieved when all input bits are set to binary 1.
23
NC
Internally connected to ACOM via a resistor. Recommend leave disconnected. Adding a capacitor to
ACOM for upward compatibility is valid. Grounding to ACOM is valid. (For upward compatibility to 12-bit
and 14-bit devices, pin 23 needs the ability to have a 0.1
F capacitor to ACOM.)
24
AVDD
Analog Supply (+3V to +5V).
25
NC
No Connect (for upward compatibility to 12 and 14b, pin 25 needs to be grounded to ACOM).
26
DCOM
Digital Ground.
27
DVDD
Digital Supply (+3V to +5V).
28
CLK
Input for clock. Positive edge of clock latches data.
HI5660
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