Timing Diagrams FIGURE 1. OUTPUT SETTLING TIME DIAGRAM FIGURE 2. PEAK GLITCH AREA (SINGLET) MEASUREMENT METHOD FIGURE 3. PROPAGATION DELAY, SETU" />
參數(shù)資料
型號(hào): HI5628INZ
廠商: Intersil
文件頁(yè)數(shù): 8/10頁(yè)
文件大?。?/td> 0K
描述: IC DAC 8BIT 125MSPS DUAL 48-LQFP
標(biāo)準(zhǔn)包裝: 250
位數(shù): 8
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 2
電壓電源: 模擬和數(shù)字
功率耗散(最大): 330mW
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-LQFP
供應(yīng)商設(shè)備封裝: 48-TQFP(7x7)
包裝: 托盤
輸出數(shù)目和類型: 4 電流,單極
采樣率(每秒): 125M
7
Timing Diagrams
FIGURE 1. OUTPUT SETTLING TIME DIAGRAM
FIGURE 2. PEAK GLITCH AREA (SINGLET) MEASUREMENT
METHOD
FIGURE 3. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM
CLK
D7-D0
IOUT
50%
tSETT
1/
2 LSB ERROR BAND
tPD
V
t(ps)
HEIGHT (H)
WIDTH (W)
GLITCH AREA = 1/2 (H x W)
CLK
D7-D0
IOUT
50%
tPW1
tPW2
tSU
tHLD
tSU
tPD
tHLD
tSETT
HI5628
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