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參數資料
| 型號： | HI3026JCQ |
| 廠商： | INTERSIL CORP |
| 元件分類： | ADC |
| 英文描述： | RELAY OPTOMOS SP-NO 150MA 4-SOP |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP48 |
| 封裝： | 12 X 12 MM, MQFP-48 |
| 文件頁數： | 7/17頁 |
| 文件大?。?/td> | 207K |
| 代理商： | HI3026JCQ |
4-1368
1
DV
EE3
GND (With a Single
Power Supply)
Digital Power Supply. Ground for ECL
input. -5V for PECL and TTL input.
+5V (Typ) (With Dual
Power Supplies)
16, 17,
18
NC
No Connect pin. Not connected with
the internal circuits.
13
CLK/E
I
ECL/PECL
Clock Input.
14
CLK/NE
I
CLK/E Complementary Input. When left
open, this pin goes to the threshold
potential. Only CLK/E can be used for
operation, but complementary input is
recommended to attain fast and stable
operation.
48
RE-
SETN/E
I
Reset Input. When the input is set to low
level, the built-in CLK frequency divider
circuit can be reset.
47
RESET/E
I
RESETN/E Complementary Input.
When left open, this pin goes to the
threshold voltage. Only RESETN/E
can be used for operation.
15
CLK/T
I
TTL
Clock input.
46
RESETN/T
I
Reset Input. When left open, this input
goes to high level. When the input is
set to low level, the built-in CLK
frequency divider circuit can be reset.
44
INV
I
TTL
Data Output Polarity Inversion Input.
When left open, this input goes to high
level. (See Table 1; I/O Correspondence
Table).
45
SELECT
V
CC
or Ground
Data Output Mode Selection. (See
Table 2; Operating Mode Table).
Pin Descriptions
(Continued)
PIN NO
SYMBOL
I/O
TYPICAL
VOLTAGE LEVEL
EQUIVALENT CIRCUIT
DESCRIPTION
13 48
47
14
DGND3
DVEE3
1.2V
R
R
R
R
46
15
DV
CC1
1.5V
R
R/2
DGND1
DV
EE3
44
DV
CC1
DGND1
DV
EE3
45
DV
CC1
DGND1
DV
EE3
HI3026
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