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參數(shù)資料
| 型號： | HI2555JCQ |
| 廠商： | INTERSIL CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | 1-Bit, AD/DA Converter For Audio Application |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP48 |
| 封裝： | MQFP-48 |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 758K |
| 代理商： | HI2555JCQ |
4-308
Master Mode/Slave Mode
(Related Pins) MS, LRCK, BCK
When using the XCS2555Q in multiple units or in a pair with
DA converters such as the CXD2558M, one of these
CXD2555Qs should be in the master mode to serve as the
source of clocks LRCK and BCK. The other CXD2555Qs are
used in the slave mode, with their clocks LRCK and BCK
supplied by the master CXD2555Q.
Crystal Oscillator Frequency Selection
(f
S
= 32kHz to 48kHz)
(Related Pins) XTLI, XTLO, XSLO, XSL1, XSL2, UNCLK,
XCLK
By setting a combination of XSLO and XSL1, with XSL2
fixed Low, the frequency of the external crystal oscillator
connected to XTLI and XTLO can be selected. In this case,
XCLK outputs a clock whose frequency is always 256 times
f
S
, and UCLK outputs a clock that is half the crystal oscillator
frequency.
When supplying the master clock fro some other external
source, not a crystal oscillator, use XTLI for this clock input
and leave XTLO open.
Crystal Oscillator Frequency Selection
(f
S
= 8kHz to 24kHz)
(Related Pins) XTLI, XTLO, XSLO, XSL1, XSL2, UNCLK,
XCLK
With XSL2 fixed High, the device can be operated with low-
f
S
frequencies which may be 1/2 or 1/4 the normal f
S
frequency. In this case, the frequency of the crystal oscillator
can be selected by setting a combination of XSL0 and XSL1
accordingly.
AD Converter Input Level
Given the constants shown in the Test Circuit on page 7, the
AD converter input level V
IN
(operational amplifier input IN)
is such that 4V
P-P
(1.4V
RMS
) is equivalent to the full-scale
output. Also, the large-amplitude inputs are possible by
varying the AD converter input resistance value (R
IN
). Use
the equation shown below to calculate this resistance value.
The AD converter generates full-scale outputs for inputs
equal to or greater than the values thus obtained.
R
IN
= 420 V
IN
[RMS] - 1200 [
]
Example: When input level = 1.4V
RMS
(4V
P-P
)
R
IN
= 4200 1.4 - 1200 = 4680
→
4700 [
]
TABLE 3.
MS
MODE
LRCK AND BCK I/O
H
Master Mode
Output
L
Slave Mode
Input
TABLE 4.
XSL2
XSL1
XSL0
CRYSTAL OSCILLATOR FREQUENCY
XCLK
UCLK
L
L
L
L
L
L
H
H
L
H
L
H
256f
S
512f
S
768f
S
1024f
S
256f
S
256f
S
256f
S
256f
S
128f
S
256f
S
384f
S
512f
S
FIGURE 37. CONNECTION EXAMPLE
CXD2555Q
(MASTER MODE)
H
MS
LRCK
BCK
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
INPUT
LRCK
CXD2555Q
(SLAVE MODE)
BCK
MS
L
LRCK
CXD2558M
BCK
FIGURE 38. CONNECTION EXAMPLE
CXD2555Q
L
XSL2
UCLK
XCLK
512f
S
256f
S
H
XSL1
H
XSL0
TO CXD2555Q IN
SLAVE MODE
TO EXTERNAL IC,
SUCH AS DSP
XTL1
XTL0
1024f
S
HI2555, CXD2555
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| HI2559 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:1-Bit D/A Converter For Audio Application |
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