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參數資料
| 型號： | HI2301JCQ |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | ADC |
| 英文描述： | 8-Bit, 30 MSPS, Video A/D Converter with Amplifier/Clamp |
| 中文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PQFP32 |
| 文件頁數： | 4/13頁 |
| 文件大?。?/td> | 746K |
| 代理商： | HI2301JCQ |
4-4
The following table shows the status of the digital output pins
when the TEST pin is used with the CE and SEL pins.
Digital Output
The following table shows the correlation between the ADIN
input voltage and the digital output code. Take notice that
the phase of ADIN input signal voltage is inverted against
the phase of the digital output.
25
V
IN1
Amplifier input pin. Biased internal at 1.9V
(when AV
DD
= 5V) or at 1.8V (when
AV
DD
= 4.75V). When standby as well. When
SEL is at Low level, V
IN1
is selected for input;
when SEL is at High level, V
IN2
is selected for
input.
27
V
IN2
26
AV
DD
5V or 4.75V
29
ADIN
A/D converter block analog input.
30
OPO
Amplifier Output. The phase of this output is
inverted against the phase of V
IN1
,
2
. In
standby mode, it becomes high-impedance
output condition.
32
CCP
Integrates the clamp control voltage. The rela-
tionship between the CCP voltage variation
and the ADIN voltage is positive phase.
Pin Descriptions
(Continued)
PIN NO.
SYMBOL
EQUIVALENT CIRCUIT
DESCRIPTION
25
27
R12
R
R11
AV
SS
AV
DD
200
29
AV
DD
AV
SS
30
AV
DD
AV
SS
32
AV
DD
AV
SS
TEST
CE
SEL
D1
D2
D3
D4
D5
D6
D7
D8
L
L
X
D1
D2
D3
D4
D5
D6
D7
D8
L
H
X
L
L
L
L
L
L
L
L
H
L
X
TEST MODE
H
H
L
H
L
H
L
H
L
H
L
H
H
H
L
H
L
H
L
H
L
H
ADIN
STEP
DIGITAL OUTPUT CODE
INPUT SIGNAL
VOLTAGE
MSB
LSB
V
RT
0
0
0
0
0
0
0
0
0
127
0
1
1
1
1
1
1
1
128
1
0
0
0
0
0
0
0
V
RB
255
1
1
1
1
1
1
1
1
HI2301
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| HI2302 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:8-Bit, 50MSPS, Video A/D Converter with Clamp Function |
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| HI2303EVAL | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Triple 8-Bit, 50 MSPS, Video A/D Converter with Clamp Function |
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