參數(shù)資料
型號(hào)： HI1175JCP
廠商： HARRIS SEMICONDUCTOR
元件分類： ADC
英文描述： 8-Bit, 20 MSPS, Flash A/D Converter
中文描述： 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP24
文件頁數(shù)： 4/13頁
文件大小： 74K
代理商： HI1175JCP
4-1072
Absolute Maximum Ratings
Thermal Information
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Reference Voltage, V
RT
, V
RB
. . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Analog Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Digital Input Voltage, CLK. . . . . . . . . . . . . . . . . . . . . . . . V
DD
to V
SS
Digital Output Voltage, V
OH
, V
OL
. . . . . . . . . . . . . . . . . . V
DD
to V
SS
Operating Conditions
(Note 1)
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 85
o
C
Supply Voltage
AV
DD
, AV
SS
, DV
DD
, DV
SS
. . . . . . . . . . . . . . . +4.75V to +5.25V
|DGND-AGND| . . . . . . . . . . . . . . . . . . . . . . . . . . . .0mV to 100mV
Reference Input Voltage
V
RB
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V and Above
V
RT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.8V and Below
Analog Input Range, V
IN
. . . . . . . V
RB
to V
RT
(1.8V
P-P
to 2.8V
P-P
)
Clock Pulse Width
t
PW1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
t
PW0
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ns (Min)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Thermal Resistance (Typical, Note 1)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range, T
STG
. . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
78
98
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
f
C
= 20 MSPS, V
DD
= +5V, V
RB
= 0.5V, V
RT
= 2.5V, T
A
= 25
o
C (Note 1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SYSTEM PERFORMANCE
Offset Voltage
E
OT
-60
-35
-10
mV
E
OB
0
+15
+45
mV
Integral Non-Linearity, INL
f
C
= 20 MSPS, V
IN
= 0.6V to 2.6V
-
±
0.5
±
1.3
LSB
Differential Non-Linearity, DNL
f
C
= 20 MSPS, V
IN
= 0.6V to 2.6V
-
±
0.3
±
0.5
LSB
DYNAMIC CHARACTERISTICS
Effective Number of Bits, ENOB
f
IN
= 1MHz
-
7.6
-
Bits
Spurious Free Dynamic Range
f
IN
= 1MHz
-
51
-
dB
Signal to Noise Ratio, SINAD
f
C
= 20MHz, f
IN
= 1MHz
-
46
-
dB
f
C
= 20MHz, f
IN
= 3.58MHz
-
46
-
dB
Maximum Conversion Speed, f
C
V
IN
= 0.6V to 2.6V, f
IN
= 1kHz Ramp
20
35
-
MSPS
Minimum Conversion Speed
-
-
0.5
MSPS
Differential Gain Error, DG
NTSC 40 IRE Mod Ramp, f
C
= 14.3 MSPS
-
1.0
-
%
Differential Phase Error, DP
-
0.5
-
Degree
Aperture Jitter, t
AJ
-
30
-
ps
Sampling Delay, t
DS
-
4
-
ns
Data Latency, t
LAT
-
-
2.5
Cycles
ANALOG INPUTS
Analog Input Bandwidth (-1dB), BW
-
18
-
MHz
Analog Input Capacitance, C
IN
V
IN
= 1.5V + 0.07V
RMS
-
11
-
pF
Distortion
--------------------------------+
=
HI1175
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