參數(shù)資料
型號: HI1-1818A-2
廠商: HARRIS SEMICONDUCTOR
元件分類: 運動控制電子
英文描述: Low Resistance, Single 8-Channel, and Differential 4-Channel, CMOS Analog Multiplexers
中文描述: 8-CHANNEL, SGL ENDED MULTIPLEXER, CDIP16
文件頁數(shù): 5/8頁
文件大?。?/td> 315K
代理商: HI1-1818A-2
5
FN3141.4
November 19, 2004
POWER SUPPLY CHARACTERISTICS
Power Dissipation, P
D
Current, I+
Full
-
-
27.5
mW
Full
-
-
0.5
mA
Current, I-
Full
-
-
1
mA
Current, I
L
NOTES:
2. V
OUT
=
±
10V, I
OUT
=
3. To drive from DTL/TTL circuits, 1k
pull-up resistors to 5.0V supply are recommended.
4. Time measured to 90% of final output level; V
OUT
= -5.0V to 5.0V, Digital Inputs = 0V to 4.0V.
Full
-
-
1
mA
1mA.
Electrical Specifications
Supplies = +15V, -15V, +5V; V
AL
= 0.4V, V
AH
= 4.0V, Unless Otherwise Specified
(Continued)
PARAMETER
TEST CONDITIONS
TEMP (
o
C)
MIN
TYP
MAX
UNITS
±
Test Circuits and Waveforms
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1C. WAVEFORMS
FIGURE 1. ENABLE DELAYS
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2C. WAVEFORMS
FIGURE 2. BREAK-BEFORE-MAKE DELAY
V
AH
= 4.0V
V
AL
= 0V
OUTPUT
10%
t
(EN)
90%
t
(EN)
50%
ENABLE DRIVE
(V
A
)
+15V
V
A
+5V
-15V
+5V
V+
V-
V
L
IN 1
IN 2-8
OUT
HI-1818A
200
12.5
pF
50
A
0
EN
A
1
A
2
ENABLE DRIVE
2V/DIV.
OUTPUT
2V/DIV.
100ns/DIV.
ENABLED
(S
1
ON)
DISABLED
50%
50%
0V
4.0V
ADDRESS
DRIVE (V
A
)
t
OPEN
OUTPUT
+15V
V
A
+5V
-15V +5V
V+
V-
V
L
IN 1
IN 2
IN 3-8
OUT
HI-1818A
50
A
0
EN
A
1
A
2
200
12.5
pF
V
A
INPUT
2V/DIV.
OUTPUT
1V/DIV.
100ns/DIV.
S
2
ON
S
1
ON
HI-1818A
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HI-201H Header; No. of Contacts:44; Pitch Spacing:0.079"; No. of Rows:2; Gender:Male; Series:1552; Body Material:Glass Filled Polyester; Connector Retention Style:Latch/Ejector; Contact Termination:Through Hole; Housing Style:Right-Angle RoHS Compliant: Yes
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