- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384417 > HI-8581CJT (HOLT INTEGRATED CIRCUITS INC) ARINC 429 LINE DRIVER AND DUAL RECEIVER PDF資料下載
參數(shù)資料
| 型號： | HI-8581CJT |
| 廠商： | HOLT INTEGRATED CIRCUITS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| 中文描述： | 1 CHANNEL(S), 125K bps, SERIAL COMM CONTROLLER, CQCC44 |
| 封裝： | CERQUAD-44 |
| 文件頁數(shù)： | 4/15頁 |
| 文件大?。?/td> | 480K |
| 代理商： | HI-8581CJT |
RECEIVER LOGICOPERATION
BITTIMING
BITRATE
PULSERISETIME
PULSEFALLTIME
PULSEWIDTH
Figure2showsablockdiagramofthelogicsectionofeach receiver.
The ARINC 429 specification contains the following timing
specificationforthereceiveddata:
100KBPS±1%
1.5±0.5μsec
1.5±0.5μsec
5μsec±5%
12K-14.5KBPS
10±5μsec
10±5μsec
34.5to41.7μsec
Again the HI-8581 accepts signals that meet these specifications
and rejects outside the tolerances.
achievesthisisdescribedbelow:
The way the logic operation
1. Keyto the performanceofthetimingchecking logicisanac-
curate 1MHz clock source.
Less than 0.1% error is recom-
mended.
2. The sampling shift registers are 10 bits long and must show
three consecutive Ones, Zeros or Nulls to be considered valid
data. Additionally,fordatabits,theOne orZerointheupperbits
of the sampling shift registers must be followed by a Null in the
lowerbitswithinthedatabittime.
three consecutive Nulls must be found in both the upper and
lowerbitsofthesamplingshift register. In this manner the mini-
mumpulsewidthisguaranteed.
For a Null in the word gap,
HIGHSPEED
LOWSPEED
FUNCTIONAL DESCRIPTION (con't)
3. Each data bit must follow its predecessor by not less than
8 samples and no more than 12 samples. In this manner the
bit rate is checked. With exactly 1MHz input clock frequency,
theacceptabledatabitratesareasfollows:
83KBPS
125KBPS
10.4KBPS
15.6KBPS
4. TheWordGaptimersamplestheNullshiftregisterevery
10inputclocks(80forlowspeed)afterthelastdatabitofa
Validreception. IftheNullispresent,theWordGapcounter
Isincremented. Acountof3willenablethenextreception.
The receiver parity circuit counts Ones received, including the
parity bit, ARINC bit 32. If the result is odd, then "0" will appear in
the32ndbit.
HIGHSPEED
LOWSPEED
DATABITRATEMIN
DATABITRATEMAX
RECEIVER PARITY
RETRIEVING DATA
Once32validbitsarerecognized,thereceiverlogicgeneratesan
End of Sequence (EOS). If the receiver decoder is enabled and
the 9th and 10th ARINC bits match the control word program bits
or if the receiver decoder is disabled, then EOS clocks the data
ready flag flipfloptoa"1",
or
dataflagforareceiverwillremainlowuntilafter
from that receiver are retrieved. This is accomplished by first
activating
with SEL, the byte selector, low to retrieve the first
byte and then activating
with SEL high to retrieve the second
byte.
retrieves data from receiver 1 and
fromreceiver2.
(or both) will go low. The
ARINCbytes
both
retrieves data
If another ARINCwordisreceived,andanewEOSoccursbefore
the two bytes are retrieved, the data is overwritten by the new
word.
D/R1
D/R2
EN
EN
ENI
EN2
SEL
EN
D/R
DEBITS
/
CMUX
CLATCH
32 TO 16 DRIVER
32 BIT LATCH
32 BIT SHIFT REGISTER
TO PINS
BIT BD14
CLOCK
CLOCK
CLK
CAND
SEND OF
PARITY
BIT
DATA
BIT CLOCK
EOS
WORD GAP
WTIMER
BIT CLOCK
END
START
CONTROL
ERROR
CLOCK
DERROR
SHIFT REGISTER
SHIFT REGISTER
NULL
ZEROS
SHIFT REGISTER
ONES
EOS
BITS 9 & 10
FIGURE 2.
RECEIVER BLOCK DIAGRAM
HI-8581
HOLT INTEGRATED CIRCUITS
4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HI-8581PJT | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PQI | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PQT | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581 | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PJI | ARINC 429 LINE DRIVER AND DUAL RECEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HI-8581CJT-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581CJTF | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581CJTF-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PJI | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
| HI-8581PJI-10 | 制造商:HOLTIC 制造商全稱:Holt Integrated Circuits 功能描述:ARINC 429 LINE DRIVER AND DUAL RECEIVER |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。