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參數(shù)資料
| 型號： | HI-318X |
| 英文描述： | ARINC 429 Differential Line Driver |
| 中文描述： | ARINC公司429差分線路驅(qū)動(dòng) |
| 文件頁數(shù)： | 5/11頁 |
| 文件大?。?/td> | 372K |
| 代理商： | HI-318X |
Notes:
1. All data taken
2. At 100% duty cycle, 15V power supplies. For 12V power supplies multiply all tabulated values by 0.8.
3. High Speed: Data Rate = 100 Kbps, Load: R = 400 Ohms, C = 10 nF. Data not presented for C = 30 nF
as this is considered unrealistic for high speed operation.
4. Similar results would be obtained with A
shorted to B
5. For applications requiring survival with continuous short circuit, operation above Tj = 175°C is not recommended.
6. Data will vary depending on air flow and the method of heat sinking employed.
on devices soldered to a single layer copper PCB (3" X 4.5" X .062").
.
in still air
OUT
OUT
HI-318X PACKAGE THERMAL CHARACTERISTICS
JUNCTION TEMPERATURE, Tj
T
A = 25
o
C
T
A = 85
o
C
T
A=125
o
C
Unsoldered
82
57°C
117°C
157°C
Soldered
65
51°C
111°C
151°C
Unsoldered
51
45°C
105°C
145°C
Soldered
28
36°C
96°C
136°C
JUNCTION TEMPERATURE, Tj
T
A = 25
o
C
T
A = 85
o
C
T
A=125
o
C
Unsoldered
82
87°C
147°C
187°C
Soldered
65
78°C
138°C
178°C
Unsoldered
51
64°C
124°C
164°C
Soldered
28
53°C
113°C
153°C
PACKAGE STYLE
1
MAXIMUM ARINC LOAD
3, 6
JA
(°C/W)
A
OUT
and B
OUT
Shorted to Ground
3, 4, 5, 6
JA
(°C/W)
HEAT SINK
HEAT SINK
PACKAGE STYLE
1
SUPPLY CURRENT
2
20 mA
20 mA
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
20 mA
20 mA
SUPPLY CURRENT
2
16-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
14-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
36 mA
36 mA
16-pin Thermally
Enhanced Plastic
SOIC (ESOIC)
40 mA
40 mA
HEAT SINK - ESOIC PACKAGES
Both the 14-pin and 16-pin thermally enhanced SOIC
packages are used for HI-318X products. These ESOIC
packages include a metal heat sink located on the bottom
surface of the device. This heat sink should be soldered
down to the printed circuit board for optimum thermal
dissipation. The heat sink is electrically isolated from the
chip and can be soldered to any ground or power plane.
However, since the chip’s substrate is at +V, connecting
the heat sink to this power plane is recommended to avoid
coupling noise into the circuit.
HOLT INTEGRATED CIRCUITS
5
HI-3182, HI-3183, HI-3184, HI-3185, HI-3186, HI-3187, HI-3188
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