參數(shù)資料
型號： HFDOM44S6RXXX
廠商： Hanbit Electronics Co.,Ltd.
英文描述： 44Pin Flash Disk Module Min.128MB ~ Max.4G, True IDE Interface
中文描述： 44Pin盤模塊Min.128MB?Max.4G，真IDE接口
文件頁數(shù)： 12/30頁
文件大小： 307K
代理商： HFDOM44S6RXXX
HANBit HFDOM44S6Rxxx
URL:www.hbe.co.kr 12 / 30 HANBit Electronics Co., Ltd.
Rev. 1.0 (April, 2005)
X
-WTG
-HS3
-HS2
-HS1
-HS0
-nDS1
-nDS0
Card (Drive) Address Register
Bit
7: this bit is in High Imoedence..
Implementation Note:
Conflicts may occur on the host data bus when this bit is provided by a Floppy Disk Controller
operating at the same addresses as the CompactFlash Storage Card. Following are some
possible solutions to this problem for the PCMCIA implementation:
1) Locate the CompactFlash Storage Card at a non-conflicting address, i.e. Secondary
address (377) or in an independently decoded Address Space when a Floppy Disk Controller
is located at the Primary addresses.
2) Do not install a Floppy and a CompactFlash Storage Card in the system at the same time.
3) Implement a socket adapter, which can be programmed to (conditionally) tri-state D7 of I/0
address 3F7h/377h when a Compact Flash Storage Card is installed and conversely to tri-state
D6-D0 of I/O address 3F7h/377h when a floppy controller is installed.
4) Do not use the CompactFlash Storage Card’s Drive Address register. This may be
accomplished by either a) If possible, program the host adapter to enable only I/O addresses
1F0h-1F7h, 3F6h (or 170h-177h, 176h) to the CompactFlash Storage Card or b) if provided
use an additional Primary / Secondary configuration in the CompactFlash Storage Card
which does not respond to accesses to I/O locations 3F7h and 377h. With either of these
implementations, the host software must not attempt to use information in the Drive Address
Register.
Bit 6 (-WTG
): this bit is 0 when a write operation is in progress, otherwise, it is 1.
Bit 5 (-HS3
): this bit is the negation of bit 3 in the Drive/Head register.
Bit 4 (-HS2
): this bit is the negation of bit 2 in the Drive/Head register.
Bit 3 (-HS1
): this bit is the negation of bit 1 in the Drive/Head register.
Bit 2 (-HS0
): this bit is the negation of bit 0 in the Drive/Head register.
Bit 1 (-nDS1
): this bit is 0 when drive 1 is active and selected.
Bit 0 (-nDS0
): this bit is 0 when the drive 0 is active and selected.
4. ATA COMMAND
CF-ATA Command Set
Table summarizes the CF-ATA command set with the paragraphs that follow describing the
individual commands and the task file for each.
Table:CF-ATA Command Set
Class
COMMAND
Code
FR
SC
SN
CY
DH
LBA
1
Check Power Mode
E5h or 98h
-
-
-
-
D
-
1
Execute Drive Diagnostic 90h
-
-
-
-
D
-
2
Format Track
50h
-
Y
-
Y
Y
Y
1
Identify Drive
ECh
-
-
-
-
D
-
1
Idle
E3h or 97h
-
Y
-
-
D
-
1
Idel Immediate
E1h or 95h
-
-
-
-
D
-
1
Initialize Drive Parameters 91h
-
Y
-
-
Y
-
1
Read Buffer
E4h
-
-
-
-
D
-
1
Read Long Sector
22h or 23h
-
-
Y
Y
Y
Y
1
Read Multiple
C4h
-
Y
Y
Y
Y
Y
1
Read Sector(s)
20h or 21h
-
Y
Y
Y
Y
Y
1
Read Verify Sector(s)
40h or 41h
-
Y
Y
Y
Y
Y
1
Recalibrate
1Xh
-
-
-
-
D
-
1
Request Sence
03h
-
-
-
-
D
-
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