參數(shù)資料
型號(hào)： HFDOM44KR256
廠商： Hanbit Electronics Co.,Ltd.
英文描述： 40Pin Flash Disk Module Min.8MB ~ Max.1GB, True IDE Interface Mode, 3.3V / 5.0V Operating
中文描述： 40Pin盤模塊Min.8MB?Max.1GB，真正的IDE接口模式，3.3 / 5.0V工作
文件頁(yè)數(shù)： 11/30頁(yè)
文件大小： 246K
代理商： HFDOM44KR256
HANBit HFDOM44KRxxx
URL:www.hbe.co.kr 11 / 30 HANBit Electronics Co., Ltd.
Rev. 1.0 (December, 2004)
for any CompactFlash Storage Card data access for the subsequent command.
BIT DESCRIPTION - CHS
7
6
5
4
3
2
1
0
Sector (7: 0)
LBA
7
6
5
4
3
2
1
0
LBA (7 : 0)
6) Cylinder Low (LBA 15-8 )Register (Address–1F4h[174h];Offset 4)
This register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the
Logical Block Address.
DIT DESCRIPTION-
CHS
7
6
5
4
3
2
1
0
Cylinder ( 7: 0 )
LBA
7
6
5
4
3
2
1
0
LBA ( 15 : 8 )
7) Cylinder High(LBA 23–16)Register(Address–1F5h[175h]; Offset 6)
This register contains the high order bits of the starting cylinder address or bits 23-16 of the
Logical Block Address.
BIT DESCRIPTION-
CHS
7
6
5
4
3
2
1
0
Cylinder ( 15 :8 )
LBA
7
6
5
4
3
2
1
0
LBA ( 23 : 16 )
8) Status
/
Alternate Status Register
(Address 1F7h[177h]/3F6h[376h];Offset 7/ Eh)
These registers return the CompactFlash Storage Card status when read by the host. Reading
the Status register does clear a pending interrupt, while reading the Alternate Status register does not. The status
bits are described as follows:
D7
D6
D5
D4
D3
D2
D1
D0
BUSY
RDY
DWF
DSC
DRQ
CORR
0
ERR
Status & Alternate Status Register
Bit 7 (BUSY
): the busy bit is set when the CompactFlash Storage Card has access to the
command buffer and registers and the host is locked out from accessing the command
register and buffer. No other bits in this register are valid when this bit is set to a 1.
Bit 6 (DRDY
): DRDY indicates whether the device is capable of performing CompactFlash Storage Card
operations. This bit is cleared at power up and remains cleared until the CompactFlash Storage Card is ready to
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