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參數資料
| 型號： | HFBR-4663 |
| 英文描述： | Fiber-Optic Transceiver |
| 中文描述： | 光纖收發(fā)器 |
| 文件頁數： | 3/16頁 |
| 文件大小： | 446K |
| 代理商： | HFBR-4663 |
11
Figure 3. Recommended Gigabit/sec Ethernet HFBR/HFCT-53D3 Fiber-Optic Transceiver and HDMP-1536A/1546A
SERDES Integrated Circuit Transceiver Interface and Power Supply Filter Circuits.
9
8
7
6
5
4
3
1
PECL
INPUT
OUTPUT
DRIVER
CLOCK
SYNTHESIS
CIRCUIT
PARALLEL
TO SERIAL
CIRCUIT
LASER
DRIVER
CIRCUIT
INPUT
BUFFER
CLOCK
RECOVERY
CIRCUIT
SERIAL TO
PARALLEL
CIRCUIT
PRE-
AMPLIFIER
POST-
AMPLIFIER
SIGNAL
DETECT
CIRCUIT
R10
270
TO SIGNAL DETECT (SD)
INPUT AT UPPER-LEVEL-IC
R11
270
50
W
R9
270
R14
100
C12
0.01 F
C11
0.01 F
2
C4
10
F
C3
0.1
F
5 V dc
C2
0.1 F
C1
0.1
F
C8*
10 F*
L2
1 H
L1
1 H
C10
0.01 F
C9
0.01 F
C5
0.1 F
R1
191
R4
191
R3
68
R2
68
5 V dc
R13
150
R12
150
50
W
50
W
50
W
+
3.3 V dc
GND
TD+
TD-
RD-
RD+
TD+
TD-
RD-
RD+
SD
VCCR
VCCT
VEET
VEER
HFBR/HFCT-53D3
FIBER-OPTIC
TRANSCEIVER
HDMP-1536A/-1546A
SERIAL/DE-SERIALIZER
(SERDES - 10 BIT
TRANSCEIVER)
NOTES:
*C8 IS AN OPTIONAL BYPASS CAPACITOR FOR ADDITIONAL LOW-FREQUENCY NOISE FILTERING.
USE SURFACE-MOUNT COMPONENTS FOR OPTIMUM HIGH-FREQUENCY PERFORMANCE.
USE 50
W MICROSTRIP OR STRIPLINE FOR SIGNAL PATHS.
LOCATE 50
W TERMINATIONS AT THE INPUTS OF RECEIVING UNITS.
VCC2
VEE2
SEE HDMP-1536A/-1546A DATA SHEET FOR
DETAILS ABOUT THIS TRANSCEIVER IC.
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