參數(shù)資料
型號: HFBR-24E6TC
英文描述: Components is Designed to Provide cost effective, High performance fiber optic communication links
中文描述: 組件旨在提供低成本,高性能的光纖通訊聯(lián)系
文件頁數(shù): 22/25頁
文件大?。?/td> 288K
代理商: HFBR-24E6TC
22
HFBR-24x6 Low-Cost 125 MHz
Receiver
Description
The HFBR-24x6 fiber optic
receiver is designed to operate
with the Agilent HFBR-14xx
fiber optic transmitters and 50/
125 μm, 62.5/125 μm, 100/140
μm and 200 μm HCS fiber optic
cable. Consistent coupling into
the receiver is assured by the
lensed optical system (Figure 1).
Response does not vary with
fiber size for core diameters of
100 mm or less.
The receiver output is an analog
signal which allows follow-on
circuitry to be optimized for a
variety of distance/data rate
requirements. Low-cost external
components can be used to
convert the analog output to
logic compatible signal levels for
various data formats and data
rates up to 175 MBd. This
distance/data rate trade-off
results in increased optical
power budget at lower data
rates which can be used for
additional distance or splices.
The HFBR-24x6 receiver
contains a PIN photodiode and
low noise transimpedance
preamplifier integrated circuit.
The HFBR-24x6 receives an
optical signal and converts it to
an analog voltage. The output is
a buffered emitter follower.
Because the signal amplitude
from the HFBR-24x6 receiver is
much larger than from a simple
PIN photodiode, it is less
susceptible to EMI, especially at
high signaling rates. For very
noisy environments, the
conductive or metal port option
is recommended. A receiver
dynamic range of 23 dB over
temperature is achievable
(assuming 10-9 BER).
The frequency response is
typically dc to 125 MHz.
Although the HFBR-24x6 is an
analog receiver, it is compatible
with digital systems. Please refer
to Application Bulletin 78 for
simple and inexpensive circuits
that operate at 155 MBd or
higher.
The recommended ac coupled
receiver circuit is shown in
Figure 14. It is essential that a
10 ohm resistor be connected
between pin 6 and the power
supply, and a 0.1 mF ceramic
bypass capacitor be connected
between the power supply and
ground. In addition, pin 6
should be filtered to protect the
receiver from noisy host
systems. Refer to AN 1038, 1065,
or AB 78 for details.
Housed Product
Unhoused Product
Figure 13. Simplified Schematic Diagram.
CAUTION: The small junction sizes inherent to the design of these components increase the components’ susceptibility to damage
from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of these
components to prevent damage and/or degradation which may be induced by ESD.
V
cc
ANALOG SIGNAL
V
EE
PIN 1 INDICATOR
BOTTOM VIEW
2
6
3 & 7
4 5
3
2
1
6
7
8
PIN
1
1
2
3
2
4
1
5
1
6
7
2
8
1
FUNCTION
NC
SIGNAL
V
EE
NC
NC
V
CC
V
EE
NC
NOTES:
1. PINS 1, 4, 5 AND 8 ARE ISOLATED FROM THE INTERNAL
CIRCUITRY, BUT ARE ELECTRICALLY CONNECTED TO EACH
OTHER.
2. PINS 3 AND 7 ARE ELECTRICALLY CONNECTED TO HEADER
1
4
2
3
BOTTOM VIEW
PIN
1
2
3
4
FUNCTION
SIGNAL
V
EE
V
CC
V
EE
BIAS & FILTER
CIRCUITS
VCC
VOUT
VEE
6
2
3, 7
POSITIVE
SUPPLY
ANALOG
SIGNAL
NEGATIVE
SUPPLY
5.0
mA
300 pF
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