參數(shù)資料
型號(hào)： HFA5253
廠商： Harris Corporation
英文描述： 800MHz, Ultra High-Speed Monolithic Pin Driver
中文描述： 800MHz的，超高速單片管腳驅(qū)動(dòng)
文件頁(yè)數(shù)： 7/18頁(yè)
文件大小： 527K
代理商： HFA5253
95
“1” applied to the “HIZ” pin. During this high impedance mode
the pin driver presents a capacitance of less than 5pF to the
DUT. Special care has to be taken to match the impedance (to
50
) at the pin driver output to minimize reflections.
The Dual-Level Comparator detects the logic levels of the
DUT pin when it acts as an output. The comparator has two
threshold level inputs, V
CH
and V
CL
. The logic level
information of the DUT pin output is sent to the
edge/window comparator through the Dual-Level
Comparator. The edge/window comparator interprets this
information in terms of corresponding transient
performance in conjunction with the timing information.
Thus it detects any possible failure transients.
The formatter sends a sequence of digital information to the
pin driver which contains logic information over time. The
Active Load is enabled when the DUT pin acts as an output.
It simulates the load of the DUT pin by sinking or sourcing
programmed current. Finally the sequencer controls the
overall activities of the automatic testing.
Decoupling Circuit for Oscillation-Free Operation
To ensure oscillation-free operation in ATE or pulse generator
applications, the pin driver needs an appropriate decoupling
circuit on a printed circuit board which consists of chip
capacitors and chip resistors. Figures 2, 3, and 4 refer to a
proven decoupling circuit currently working in the lab and a 1X
scale film of its associated PC board (metal level). Do not
connect the V
CC1
and V
CC2
pins or the V
EE1
and V
EE2
pins
together immediately, rather run separate traces until they can
be joined at a large bypass capacitor (0.1
μ
F || 10.0
μ
F).
The control pins, DATA, DATA, HIZ, and HIZ are fed ECL
signals through 50
micro-strip lines terminated with 50
for
impedance matching since the input impedance at these
pins is much higher than 50
. At the end of the micro-strip
lines there is usually a high-speed pulse generator with an
output impedance of 50
. A 50
micro-strip line is
connected to each of the pins, DATA and HIZ through a 50
chip resistor to monitor the pulse signals.
The input pins, V
HIGH
, V
LOW
, +SRC, and -SRC need to be
protected from any capacitively coupled AC noise. Normally
this protection can be achieved by having a low pass filter
consisting of a 50
chip resistor and a chip capacitor, 470pF
for V
HIGH
/V
LOW
and 0.1
μ
F for +SRC/-SRC. Without this
protection circuit the pin driver may oscillate due to signals
fed back from the output through the PC board ground.
The power supply pins, V
CC1
, V
CC2
, V
EE1
, and V
EE2
,
require decoupling chip capacitors of 470pF, 0.1
μ
F, 10
μ
F.
Having decoupling capacitors close to V
CC2
and V
EE2
is
essential since large AC current will flow through either
V
CC2
or V
EE2
during transients.
The output of the pin driver is usually connected to the device-
under-test (DUT) through 50
micro-strip line and coaxial cable
which carries the signal to a high input impedance DUT pin.
PARTS LIST
QTY
VALUE
COMPONENT
6
470pF
Chip Cap: 0805
4
0.1
μ
F
Chip Cap: 0805
2
10
μ
F
Tant.
8
50
Chip Res: 0805
2
100
Chip Res: 0805
7
SMA Jacks
Wide Body
1
20 Lead PSOP
HFA5253
4
4-40
1” Standoff
4
4-40
1/4” Screws
2
Twisted Wire Assemblies with 4 Wires Each:
One for V
CC
,
V
HIGH
,
+SRC, GND; and 1 for V
EE
,
V
LOW
,
-SRC, GND.
CLOCK,
START
MEMORY
EDGE/
WINDOW
COMPARATOR
MEMORY
DATA
FORMATTER
FAIL
MEMORY
FAIL
SEQUENCER
TIMING
DATA
TIMING
DUT
DATA
ACTIVE
LOAD
50
V
CH
V
CL
DUAL LEVEL COMPARATOR
PIN DRIVER
HIZ
FIGURE 1. TYPICAL ATE SYSTEM
HFA5253
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