4-31
Bit 2
Internal digital loop back mode (SDI pin becomes LOCK input to acquisition block).
0 = normal chip operation loop back disabled.
1 = loop back enabled, A/D and D/A converters bypassed, chip will not respond to external signals.
Bit 1
enable PN to lower test bus address (2-0).
0 = normal.
1 = PN to test bus address.
Bit 0
enable PN to upper test bus address (7-3).
0 = normal.
1 = PN to test bus address.
CONFIGURATION REGISTER ADDRESS 33 (42h) R/W TEST MODES 2 (Continued)
CONFIGURATION REGISTER ADDRESS 34 (44h) R/W TEST BUS ADDRESS
Bits 7:0
Address bits for various tests. See Tech Brief #TBD for a description of the factory test modes.
CONFIGURATION REGISTER ADDRESS 35 (46h) R/W ED THRESHOLD
Bit 7
Energy Detect Threshold control.
0 = threshold is relative to noise floor.
1 = threshold is absolute.
Bits 6:0
ED Threshold. Range 0 - 127dBm. RSSI > threshold triggers ED.
CONFIGURATION REGISTER ADDRESS 36 (48h) R/W DELAY SPREAD THRESHOLD FOR CMF CONTROL
Bit 7:5
Delay spread count. Range 0 - 7. Used for evaluation only.
Bits 4:0
Delay spread threshold. 0.xxxx.
This and the next 3 thresholds are used in the following formula to determine which CMF weights to use. CW detect is not
configurable.
If
(CW and RSSI < (CW RSSI threshold + NoiseFloor)) or (no CW and RSSI < (SNR threshold #1 + NoiseFloor)) or (no CW
and delay spread < threshold and RSSI < (SNR threshold #2 + NoiseFloor))
then
;
use Default CMF weights,
else,
use Calculated CMF weights.
CONFIGURATION REGISTER ADDRESS 37 (4Ah) R/W CW RSSI THRESHOLD FOR CMF CONTROL
Bit 7
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bit 6
Force default CMF weights.
0 = normal.
1 = force default CMF weights.
Bit 5
Force calculated CMF weights.
0 = normal.
1 = force calculated CMF weights.
Note: this cannot be combined with bit 6. A “1” on both will produce undefined results.
Bits 4:0
CW RSSI threshold, range 0 to 31dB.
CONFIGURATION REGISTER ADDRESS 38 (4Ch) R/W SNR THRESHOLD #1 FOR CMF CONTROL
Bits 7:4
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bits 3:0
SNR threshold #1 range 0 to 15dB.
CONFIGURATION REGISTER ADDRESS 39 (4Eh) R/W SNR THRESHOLD #2 FOR CMF CONTROL
Bits 7:4
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bits 4:0
SNR threshold #2, range 0 to 31dB.
CONFIGURATION REGISTER ADDRESS 40 (50h) R/W DC OFFSET THRESHOLD
Bits 7:6
R/W but not currently used internally, should be set to zero to ensure compatibility with future revisions.
Bits 5:0
DC offset Threshold, range 0 to 63dB. RSSI > (threshold + NoiseFloor) enables DC offset calculation and compensation.
HFA3863