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參數(shù)資料
| 型號： | HFA3824AIV |
| 廠商： | INTERSIL CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | Direct Sequence Spread Spectrum Baseband Processor |
| 中文描述： | TELECOM, CELLULAR, BASEBAND CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 MM, PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 14/40頁 |
| 文件大小： | 271K |
| 代理商： | HFA3824AIV |
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2-112
Reset
The RESET signal is used during the power down mode as
described in the Power Down Mode section. The RESET does
not impact any of the internal configuration registers when
asserted. Reset does not set the device in a default configura-
tion, the HFA3824A must always be programmed on power
up. The HFA3824A can be programmed with RESET in any
state.
Transmitter Description
The
HFA3824A
Sequence Spread Spectrum DBPSK/DQPSK modulator. It
can handle data rates of up to 4 MBPS (refer to AC and DC
specifications). The major functional blocks of the transmitter
include a network processor interface, DBPSK/DQPSK mod-
ulator, a data scrambler and a PN generator, as shown on
Figure 9.
The transmitter has the capability to either generate its own
synchronization preamble and header or accept the pream-
ble and header information from an external source. In the
first case, the transmitter knows when to make the DBPSK
to DQPSK switchover, as required.
The preamble and header are always transmitted as DBPSK
waveforms while the data packets can be configured to be
either DBPSK or DQPSK. The preamble is used by the
receiver to achieve initial PN synchronization while the
header includes the necessary data fields of the communi-
cations protocol to establish the physical layer link. There is
a choice of four potential preamble/header formats that the
HFA3824A can generate internally. These formats are
referred to as mode 0, 1, 2 and 3. Mode 0 uses the minimum
number of available header fields while mode 3 is a full
transmitter
is
designed
as
a
Direct
protocol mode utilizing all available header fields. The num-
ber of the synchronization preamble bits is programmable.
The transmitter accepts data from the external source,
scrambles it, differentially encodes it as either DBPSK or
DQPSK, and mixes it with the BPSK PN spreading. The
baseband digital signals are then output to the external IF
modulator.
The transmitter includes a programmable PN generator that
can provide 11, 13, 15 or 16 chip sequences. The transmitter
also contains a programmable clock divider circuit that
allows for various data rates. The master clock (MCLK) can
be a maximum of 44MHz.
The chip rates are programmed through CR3 for TX and
CR2 for RX. In addition the data rate is a function of the
sample clock rate (MCLK) and the number of PN bits per
symbol.
The following equations show the Symbol rate for both TX
and RX as a function of MCLK, Chips per symbol and N.
N is a programmable parameter through configuration regis-
ters CR2 and CR3. The value of N is 2, 4, 8 or 16. N is used
internally to divide the MCLK to generate other required
clocks for proper operation of the device.
Symbol Rate = MCLK/(N x Chips per Symbol).
The bit rate Table 7 shows examples of the relationships
expressed on the symbol rate equation.
The modulator is capable of switching rate automatically in
the case where the preamble and header information are
DBPSK modulated, and the data is DQPSK modulated.
The modulator is completely independent from the demodu-
lator, allowing the PRISM baseband processor to be used in
full duplex operation.
TX_I_OUT
TX_Q_OUT
SPREADER
TX_SPREAD_STQ
16
SHIFT REG
PN GENERATOR
PROCESSOR
INTERFACE
PACKET
FORMAT/
CRC-16
TX_DATA
DBPSK/DQPSK
DIFFERENTIAL ENCODER
SHIFT REG
TX_BIT_CK
SCRAM_TAPS
SCRAMBLER
TX_CHIP_CK
TX_SCRAM_SEED
7
7
7
7
CONTROL PORT
TX PORT
I
OUT
Q
OUT
FIGURE 9. MODULATOR DIAGRAM
HFA3824A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HFA3824A | Direct Sequence Spread Spectrum Baseband Processor |
| HFA3842B | PCMCIA/USB Wireless LAN Medium Access Controller |
| HFA3842BIN | PCMCIA/USB Wireless LAN Medium Access Controller |
| HFA3842BIN-TK | PCMCIA/USB Wireless LAN Medium Access Controller |
| HFA3842IN96 | Wireless LAN Medium Access Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HFA3824AIV WAF | 制造商:Harris Corporation 功能描述: |
| HFA3824AIV96 | 制造商:Rochester Electronics LLC 功能描述:BASEBAND PROCESSOR - Bulk |
| HFA3824EVAL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3824IV | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HFA3824IV96 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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