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參數(shù)資料
| 型號： | HFA3783IN |
| 廠商： | INTERSIL CORP |
| 元件分類： | 衰減器 |
| 英文描述： | I/Q Modulator/Demodulator and Synthesizer |
| 中文描述： | 70 MHz - 600 MHz RF/MICROWAVE I/Q MODEM |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 3/34頁 |
| 文件大小： | 608K |
| 代理商： | HFA3783IN |
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3
21
CP_V
DD
PLL Charge Pump Power Supply. Independent supply for the charge pump, not to exceed 3.6V. Requires
high quality capacitor decoupling.
22
CP_D0
PLL Charge Pump Current Output.
24
LD
PLL Lock Detect Output. Requires low capacitive loading not to exceed 5pF.
26
LO_IN-
Local Oscillator Differential Buffer Negative Input. Requires AC coupling. For single ended applications
its complementary input, Pin 27, must be bypassed to ground via a capacitor.
27
LO_IN+
Local Oscillator Differential Buffer Positive Input. Requires AC coupling. For single ended applications its
complementary input, Pin 26, must be bypassed to ground via a capacitor. Pins 26 and 27 are
interchangeable.
NOTE: High second harmonic content LO waveforms may degrade I/Q phase accuracy.
28
LO_V
CC
Local Oscillator Buffer Amplifier Power Supply. Requires high quality capacitor decoupling.
30
TXQ-
Baseband Quadrature Differential Inputs for IF Transmission. DC coupled requiring 1.3V common mode
bias voltages.
31
TXQ+
32
1.2V_OUT
Highly Regulated Band Gap 1.2V Buffered Output. Used in conjunction with ADCs and DACs for voltage
/temperature tracking. Requires high quality 0.1
μ
F capacitor decoupling to ground.
33
TXI-
Baseband In Phase Differential Inputs for IF Transmission. DC coupled requiring 1.3V common mode
bias voltages.
34
TXI+
35
RXQ-
Baseband Quadrature Differential Outputs From IF Demodulation. DC coupled output with 1.2V common
mode DC outputs. AC coupling pins 35, 36, 37 and 38 requires programmable register activation for DC
hold during TX to RX switching.
36
RXQ+
37
RXI-
Baseband In Phase Differential Outputs From IF Demodulation. DC coupled output with 1.2V common
mode DC outputs.
38
RXI+
40
BB_V
CC
Baseband Receive LPF Output and Offset Control Power Supply. Requires high quality capacitor
decoupling.
42
CAL_EN
CMOS Input for Activation Of Internal DC Offset Adjust Circuit for the Receive Baseband Outputs. A rising
edge activates the calibration cycle, which completes within a programmable time and holds the
calibration while this pin is held high. In applications where the synthesizer is not used, this pin needs to
be grounded.
43
PE2
Power Enable Control Pins: Please refer to the POWER ENABLE TRUTH TABLE in the Electrical
Specifications section.
44
PE1
45
IF_DET
IF Detector Current Output. A current source of 175
μ
A typical is generated at this pin when the IF AGC
receive differential or single ended signal at pins 3 and 4 is between 100 and 200mV
PP
.
47
RX_VAGC
Receive AGC amplifier DC gain control input.
2, 5, 11, 12, 15,
16, 23, 25, 29,
39, 41, 46, 48
GND
Grounds. Connect to a solid ground plane.
Pin Descriptions
(Continued)
PIN NUMBER
NAME
DESCRIPTION
HFA3783
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相關(guān)代理商/技術(shù)參數(shù) |
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| HFA3783IN96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:I/Q Modulator/Demodulator and Synthesizer |
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| HFA3824AIV | 制造商:Rochester Electronics LLC 功能描述:BASEBAND PROCESSOR - Bulk |
| HFA3824AIV WAF | 制造商:Harris Corporation 功能描述: |
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