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參數(shù)資料
| 型號(hào)： | HFA3726IN96 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 衰減器 |
| 英文描述： | 400MHz Quadrature IF Modulator/Demodulator |
| 中文描述： | 10 MHz - 400 MHz RF/MICROWAVE QUADRAPHASE MODEM |
| 封裝： | PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大?。?/td> | 162K |
| 代理商： | HFA3726IN96 |
16
Quadrature Down Converter
The quadrature down converter mixers are based in a Gilbert
cell design. The input signal is routed to both mixers in parallel.
With full balanced differential architecture, these mixers are
driven by an accurate internal Local Oscillator (LO) chain as
described later. Phase and gain accuracy of the output
baseband signals are excellent and are a function of the
combination of LO accuracy, balanced device design and
layout characteristics. Mainly used for down conversion, its
input frequency response exceeds 400MHz with a differential
voltage gain of 2.5. With a differential input impedance of 1k
,
the input compression point exceeds 2V
P-P
, which makes it
suitable for use with the hard limiting output from the limiter
amplifier chain or any low power external AGC application. The
output frequency response is limited to 30MHz for “I” and “Q”
baseband signals driving a 4k
differential load.
The HFA3726 down conversion mixers can generate two
10MHz, 90
o
apart signals, with the use of proper low pass
filtering, and exhibits
±
4
o
and
±
0.5dB of phase and
amplitude match for a input CW IF signal of 400MHz and a
2XLO input of 780MHz.
LO Quadrature Generator
The In Phase and Quadrature reference signals are
generated by a divide by two chain internal to the device
which drives both the up and down conversion mixers. With
a fully balanced approach, the phase relationship between
the two quadrature signals is within 90
o
±
4
o
for a wide 20 to
400MHz frequency range. The reference signal input
frequency needs to be twice the desired internal reference
frequency. The ground referenced 2XLO input is current
driven, which makes the input power requirement a function
of external components that can be calculated assuming the
input impedance of 130
. A typical input current value of
200
μ
A
RMS
is the only requirement for reliable LO
generation. Figure 24 shows a typical 2XLO input network.
Divide by two flip flop architectures for LO generation often
require tight control of signal purity or duty cycles. The
HFA3726 has an internal duty cycle compensation scheme
which eases the requirements of tight controlled duty cycles.
In addition, a 50
LO buffer is available to the user for PLLs
design reference. It substitutes a divide by two prescaler
needed to bring the 2X LO frequency reference down. It is
capable to drive 100mV
P-P
into 50
and its frequency
response is from 20MHz to 400MHz corresponding to a
2XLO input frequency response of 40MHz to 800MHz. The
LO buffer can be disabled by removing the ground
connection to the pin LO GND. The quadrature generator is
always enabled for either transmit or receive modes.
Quadrature Up Converter
The Quadrature up converter mixers are also based on a
doubly balanced Gilbert Cell design. “I” and “Q” Up converter
signals are summed and buffered together through a single
end open collector stage. As with the demodulators, both
modulator mixers are driven from the same quadrature LO
generator. It features a
±
4
o
and 0.5dB of phase and
amplitude balance up to 400MHz which are reflected into its
SSB characteristics. For “I” and “Q” differential inputs of
500mV
P-P
, 90
o
apart, the carrier feedthrough or LO leakage
is typical -30dBc into 250
with a sideband suppression of
minimum 26dBc at 400MHz. Carrier feedthrough can be
further improved by disabling the LO output port (please
refer to pin#50 description) or using a DC bias network as in
Figure 25. Featuring an output compression level of 1V
P-P
,
the modulator output can generate a CW signal of typical -
10dBm into 250
(158mV
RMS
) when differential DC inputs
of 500mV
P-P
(equivalent to applying
±
125mV ground
referenced levels from the DC bias quiescent point of the
device input) are applied to both “I” and “Q” inputs. Four
quadrant phase shifts of the carrier output, like in Vector
Modulator applications, can be set by proper choice of “I”
and “Q” DC differential inputs, such that the square root of
the sum of the squares of I and Q is constant.
Although specified to drive a 250
load, the HFA3726
modulator open collector output enables user designed
output matching networks to suit any application interface.
The nominal AC current capability of this port is of
1.3mA
RMS
, which is shared between the termination resistor
and the load for I and Q differential DC inputs of 500mV
P-P
as explained above. (Use 70.7% of this AC capability for I
and Q quadrature signals in case of SSB generation).
Low Pass Filters
These filters are implemented using a 5th order Butterworth
architecture. They are multiplexed, i.e., the same filter bank
is used for both transmit and receive modes.
The filter block, in the transmit mode is set to accept digital
(TTL threshold) levels inputs for “I” and “Q” signals with a
frequency cutoff of 7.7MHz. An external resistor is used to fine
tune the cut off frequencies for each setting within
±
10% of the
nominal value. This feature is often needed to fulfill
requirements of spectral mask compliance at the antenna
output.
EQUIVALENT
130
I RMS = 200
μ
A
50
220
56
47p
44
FIGURE 24. MOD LO IN (2XLO) EQUIVALENT CIRCUIT
HFA3726
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相關(guān)代理商/技術(shù)參數(shù) |
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| HFA3761 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:400MHz AGC and Quadrature IF Demodulator |
| HFA3761/3763IN WAF | 制造商:Harris Corporation 功能描述: |
| HFA3761IN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:400MHz AGC and Quadrature IF Demodulator |
| HFA3763 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:400MHz Quadrature Modulator and AGC |
| HFA3763IN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:400MHz Quadrature Modulator and AGC |
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