參數(shù)資料
型號(hào)： HFA3683AIN
廠商： INTERSIL CORP
元件分類(lèi)： 無(wú)繩電話/電話
英文描述： 288 MACROCELL 3.3 VOLT ISP CPLD
中文描述： TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT, PQFP64
封裝： 10 X 10 MM, TQFP-64
文件頁(yè)數(shù)： 4/17頁(yè)
文件大小： 187K
代理商： HFA3683AIN
2-4
Absolute Maximum Ratings
Thermal Information
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6V
Voltage on Any Other Pin. . . . . . . . . . . . . . . . . . . -0.3 to V
CC
+0.3V
V
CC
to V
CC
Decouple . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V
Any GND to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +0.3V
Pins 4, 19, 52, 56, 57 and 59. . . . . . . . . . . . . . . . . . . . . 0.3 to +0.6V
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85
o
C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . .2.7V to 3.3V
Thermal Resistance (Typical, Note 1)
TQFP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package). . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300
o
C
(TQFP - Lead Tips Only)
θ
JA
(
o
C/W)
65
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
General Electrical Specifications
PARAMETER
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
Supply Voltage
Full
2.7
-
3.3
V
Receive Total Supply Current (LNA in High Gain)
25
-
33
38
mA
Receive Total Supply Current (LNA in Low Gain)
25
-
27
32
mA
Transmit Total Supply Current
25
-
40
45
mA
Standby Total Supply Current (PLL and LO Buffers Active)
25
-
6
8
mA
TX/RX Power Down Supply Current
Full
-
10
100
μ
A
TX/RX/Power Down Time (Note 2)
Full
-
1
10
μ
s
RX/TX, TX/RX Switching Time (Note 2)
Full
-
0.2
1
μ
s
CMOS Low Level Input Voltage (CLK, DATA, LE) (Note 3)
Full
-
-
0.3V
DD
V
CMOS High Level Input Voltage (CLK, DATA, LE) (Note 3)
Full
0.7V
DD
-
3.6
V
CMOS High or Low Level Input Current (CLK, DATA, LE)
Full
-3.0
-
+3.0
μ
A
Control Logic Low Level Input Voltage (H/L, PE1, PE2) (Note 4)
Full
-0.3
-
0.5
V
Control Logic High Level Input Voltage (H/L, PE1, PE2) (Notes 3 and 4)
Full
V
DD-0.5
-
-
V
NOTES:
2. TX/RX/TX switching time and power Down/Up time are dependent on external components.
3. V
DD
is the supply voltage of external Control sources.
4. These three pins H/L, PE1 and PE2 are not connected to CMOS circuitry and have different thresholds from all other control pins.
Cascaded LNA/Mixer AC Electrical Specifications
Assumes a direct connection between the LNA and Mixer, IF = 374MHz,
LO = 2075MHz at -6dBm, V
CC
= 2.7 Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
TEMP.
(
o
C)
MIN
TYP
MAX
UNITS
RF Frequency Range
Full
2400
-
2500
MHz
IF Frequency Range
Full
280
374
600
MHz
LO Frequency Range
Full
1800
-
2220
MHz
LO Input Drive Level
Single End or Differential
Full
-10
-6
0
dBm
Power/Voltage Gain
High Gain Mode
Full
21.5
25
29
dB
Noise Figure SSB
Full
-
3.7
5.0
dB
Input IP3
Full
-17.5
-11
-
dBm
Input P1dB
Full
-27.5
-22
-
dBm
HFA3683A
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