- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371806 > HFA3683A (INTERSIL CORP) 288 MACROCELL 3.3 VOLT ISP CPLD PDF資料下載
參數(shù)資料
| 型號(hào)： | HFA3683A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 無繩電話/電話 |
| 英文描述： | 288 MACROCELL 3.3 VOLT ISP CPLD |
| 中文描述： | TELECOM, CELLULAR, RF AND BASEBAND CIRCUIT |
| 封裝： | PLASTIC, TQFP-64 |
| 文件頁數(shù)： | 2/17頁 |
| 文件大?。?/td> | 187K |
| 代理商： | HFA3683A |
2-2
Pinout
HFA3683A
(TQFP)
TOP VIEW
6463 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
G
C
G
R
G
I
B
P
I
G
P
G
R
G
T
R
GND
LNA_VCC1
GND
RX_IN
GND
GND
H/L
BIAS1_VCC1
TX_VCC1
T
GND
GND
GND
PE2
PE1
GND
TXA_OUT
G
G
T
D
L
C
R
R
G
S
G
C
C
G
L
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
RX_MX_OUT-
TX_MX_IN-
GND
RX_LO_DRIVER_VCC1
GND
LO_VCC1
GND
LO_IN-
LO_IN+
GND
TX_LO_DRIVER_VCC1
TX_MX_VCC1
TX_MX_VCC1
TX_MX_VCC1
TX_MX_OUT
TX_MX_VCC1
Pin Description
PIN
NAME
DESCRIPTION
2
LNA_VCC1
Low Noise Amplifier Positive Power Supply.
4
RX_IN
Low Noise Amplifier RF Input, internally DC coupled and requires an external blocking capacitor. A shunt capacitor to
ground matches the input for return loss and optimum NF.
6
BIAS1_VCC1
Bias Positive Power Supply for the LNA and Preamplifier.
8
H/L
High or Low Gain Select, controls the LNA high and low gain modes.
9
PE2
This pin along with pin PE1 and bit M(0) of PLL_PE determine which of various operational modes will be active. Please
refer to the Power Enable Truth Table.
10
PE1
This pin along with pin PE2 and bit M(0) of PLL_PE determine which of various operational modes will be active. Please
refer to the Power Enable Truth Table.
11
TX_VCC1
Transmit Amplifier Positive Power Supply, requires a high quality decoupling capacitor and a short return path.
13
TXA_OUT
Transmit Amplifier Output, internally matched to 50
, requires an external DC blocking capacitor.
17
TX_VCC1
Transmit Amplifier Positive Power Supply.
19
TXA_IN
Transmit Amplifier Input, internally AC coupled.
21
LE
Synthesizer Latch Enable, the serial interface is active when LE is low and the serial data is latched into defined
registers on the rising edge of LE.
22
DATA
Synthesizer Serial Data Input, clocked in on the rising edge of the serial clock, MSB first.
23
CLK
Synthesizer Clock, DATA is clocked in on the rising edge of the serial clock, MSB first.
24
REF_BY
Synthesizer Reference Frequency Input Bypass, internally DC coupled and requires an external bypass to ground
when REF_IN is used as a Single Ended input, alternatively, requires an external AC coupling capacitor when used as
a differential input.
25
REF_IN
Synthesizer Reference Frequency Input, internally DC coupled and requires an external AC coupling capacitor.
HFA3683A
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HFA3683AIN | 288 MACROCELL 3.3 VOLT ISP CPLD |
| HFA3726IA | RF Modulator/Demodulator |
| HFA3726IA96 | RF Modulator/Demodulator |
| HFA3726IN96 | 400MHz Quadrature IF Modulator/Demodulator |
| HFA3726 | 288 MACROCELL 3.3 VOLT ISP CPLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HFA3683AIN | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:2.4GHz RF/IF Converter and Synthesizer |
| HFA3683AIN96 | 制造商:Intersil Corporation 功能描述: |
| HFA3724 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:400MHz Quadrature IF Modulator/Demodulator |
| HFA3724/3725IN WAF | 制造商:Harris Corporation 功能描述: |
| HFA3724/3726IN WAF | 制造商:Harris Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。