參數(shù)資料
型號(hào): HEF4720
廠商: NXP Semiconductors N.V.
英文描述: 256-bit, 1-bit per word random access memories
中文描述: 256位,1每字位隨機(jī)存取存儲(chǔ)器
文件頁(yè)數(shù): 2/16頁(yè)
文件大小: 180K
代理商: HEF4720
January 1995
2
Philips Semiconductors
Product specification
256-bit, 1-bit per word random access memories
HEF4720B
HEF4720V
DESCRIPTION
The HEF4720B and HEF4720V are 256-bit, 1-bit per word
random access memories with 3-state outputs. The
memories are fully decoded and completely static.
Recommended supply voltage range for HEF4720B is 3 to
15 V and for HEF4720V is 4,5 to 12,5 V; minimum
stand-by voltage for both types is 3 V.
The use of LOCMOS gives the added advantage of very
low stand-by power. The circuits can be directly interfaced
with standard bipolar devices (TTL) without using special
interface circuits. The memory operates from a single
power supply. The separate chip select input (CS) allows
simple memory expansion when the outputs are wire-O
Red. If CS is HIGH, the outputs are floating and no new
information can be written into the memory. The signal at
O has the same polarity as the data input D, while the
signal at O is the complement of the signal at O. The write
control W must be HIGH for writing into the memory.
Fig.1 Functional diagram.
Fig.2 Pinning diagram.
FAMILY DATA
See Family Specifications.
HEF4720BP;
HEF4720VP(N): 16-lead DIL; plastic
(SOT38-1)
HEF4720VD(F): 16-lead DIL; ceramic
(cerdip) (SOT74)
HEF4720VT(D): 16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
HEF4720BD;
HEF4720BT;
相關(guān)PDF資料
PDF描述
HEF4724BD 8-bit addressable latch
HEF4724BF 8-bit addressable latch
HEF4724BN 8-bit addressable latch
HEF4724BP 8-bit addressable latch
HEF4724BT 8-bit addressable latch
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