參數(shù)資料
型號: HEF4093BU
廠商: NXP Semiconductors N.V.
元件分類: 通用總線功能
英文描述: Quad 2-input NAND Schmitt trigger
中文描述: 四2輸入與非施密特觸發(fā)器
封裝: HEC4093BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week 32, 2004,;HEC4093BT<SOT108-1 (SO14)|<<http://www.nxp.com/packages/SOT108-1.html<1<week
文件頁數(shù): 3/15頁
文件大?。?/td> 367K
代理商: HEF4093BU
HEF4093B
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 7 — 1 September 2010
3 of 15
NXP Semiconductors
HEF4093B
Quad 2-input NAND Schmitt trigger
6.2 Pin description
Table 2.
Symbol
1A to 4A
1B to 4B
1Y to 4Y
V
DD
V
SS
7. Functional description
Table 3.
Input
nA
L
L
H
H
[1]
H = HIGH voltage level; L = LOW voltage level.
8. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V
SS
= 0 V (ground).
Symbol
Parameter
Conditions
V
DD
supply voltage
I
IK
input clamping current
V
I
<
0.5 V or V
I
> V
DD
+ 0.5 V
V
I
input voltage
I
OK
output clamping current
V
O
<
0.5 V or V
O
> V
DD
+ 0.5 V
I
I/O
input/output current
I
DD
supply current
T
stg
storage temperature
T
amb
ambient temperature
P
tot
total power dissipation
T
amb
=
40
°
C to +125
°
C
DIP14
SO14
P
power dissipation
per output
[1]
For DIP14 packages: above T
amb
= 70
°
C, P
tot
derates linearly with 12 mW/K.
For SO14 packages: above T
amb
= 70
°
C, P
tot
derates linearly with 8 mW/K.
[2]
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
14
7
Description
input
input
output
supply voltage
ground (0 V)
Function table
[1]
Output
nY
H
H
H
L
nB
L
H
L
H
Limiting values
Min
0.5
-
0.5
-
-
-
65
40
Max
+18
±
10
V
DD
+ 0.5
±
10
±
10
50
+150
+125
Unit
V
mA
V
mA
mA
mA
°
C
°
C
[1]
-
750
500
100
mW
mW
mW
[2]
-
-
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