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參數(shù)資料
| 型號(hào)： | HD74LVC125 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Quad. Bus Buffer Gates with 3-state Outputs(三態(tài)輸出的四總線緩沖門) |
| 中文描述： | 四?？偩€緩沖器蓋茨三態(tài)輸出（三態(tài)輸出的四總線緩沖門） |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 42K |
| 代理商： | HD74LVC125 |
HD74LVC125
Quad. Bus Buffer Gates with 3-state Outputs
ADE-205-108(Z)
Rev.0
October 1995
Description
The HD74LVC125 has four bus buffer gates in a 14 pin package. The device require the three state
control input C to be taken high to put the output into the high impedance condition, whereas the device
requires the control input to be low to put the output into high impedance. Low voltage and high speed
operation is suitable at the battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
V
CC
= 2.0 V to 5.5 V
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
°
C)
High output current
±
24 mA (@V
CC
= 3.0 V to 5.5 V)
Function Table
Inputs
C
A
Outputs Y
H
X
Z
L
L
L
L
H :
L :
X :
Z :
H
H
High level
Low level
Immaterial
High impedance
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