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參數(shù)資料
| 型號： | HD74LV165A |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Parallel-Load 8-bit Shift Register(并行載入8位移位寄存器) |
| 中文描述： | 并聯(lián)負(fù)載8位的移位寄存器（并行載入8位移位寄存器） |
| 文件頁數(shù)： | 7/17頁 |
| 文件大小： | 75K |
| 代理商： | HD74LV165A |
HD74LV165A
7
Switching Characteristics
V
CC
= 2.5
±
0.2 V
Ta = 25
°
C
Ta = –40 to 85
°
C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test
Conditions
FROM
(Input)
TO
(Output)
Maximum
clock
fre
quency
fmax
50
80
—
45
—
MHz
C
L
= 15 pF
40
65
—
35
—
C
L
= 50 pF
Propa-
gation
delay time
t
PLH
/t
PHL
—
13.1
21.5
1.0
23.5
ns
C
L
= 15 pF
SH/
LD
Q
H
or
Q
H
—
16.1
25.1
1.0
28.0
C
L
= 50 pF
—
12.2
19.8
1.0
22.0
C
L
= 15 pF
CLK
—
15.3
23.3
1.0
26.0
C
L
= 50 pF
—
12.9
21.7
1.0
24.0
C
L
= 15 pF
H
—
15.9
25.3
1.0
28.0
C
L
= 50 pF
Setup time
t
su
7.0
—
—
7.0
—
ns
CLK INH before CLK
↑
11.5
—
—
12.0
—
data before SH/
LD
↑
7.0
—
—
8.5
—
ns
SH/
LD
high before CLK
↑
8.5
—
—
9.5
—
SER before CLK
↑
Hold time
t
h
0.0
—
—
0.5
—
ns
PAR data after SH/
LD
↑
–1.0
—
—
0.0
—
SER data after CLK
↑
0.0
—
—
0.0
—
SH/
LD
high atfer CLK
↑
Pulse
width
t
w
11.0
—
—
13.0
—
ns
SH/
LD
low
8.5
—
—
9.0
—
CLK H or L
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