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參數(shù)資料
| 型號： | HD74HC85 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-Bit Magnitude Comparator |
| 中文描述： | 4位數(shù)值比較 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 53K |
| 代理商： | HD74HC85 |
HD74HC85
4-Bit Magnitude Comparator
Description
The HD74HC85 id designed for high speed comparison of two four bit words. This circuit has eight
comparison input, 4 for each word; three cascade inputs (A < B, A > B, A = B); and three decision outputs
(A < B, A > B, A = B). The result of a comparison is indicated by a high level on one of the decision
outputs. thus it may be determined whether one word is “greater than,” “l(fā)ess than,” or “equal to” the other
word. by connecting the outputs of the least significant stage to the cascade inputs of the enxt stage, words
of greater than four bits can be compared. In addition the least significant stage must have a high level
applied to the A = B input, and a low level to the A < B, and A > B inputs.
Features
High Speed Operation: t
pd
(Data Word Input to Output) = 20 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
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