參數(shù)資料
型號: HD74HC173
廠商: Hitachi,Ltd.
英文描述: Octal Buffers/Drivers With 3-State Outputs 20-CFP -55 to 125
中文描述: 4位D型寄存器(3態(tài)輸出)
文件頁數(shù): 1/9頁
文件大?。?/td> 56K
代理商: HD74HC173
HD74HC173
4-bit D-type Register (with 3-state Outputs)
Description
The four D type Flip-Flops operate synchronously from a common clock. The 3-state outputs allow the
device to be used in bus organized systems. The outputs are placed in the 3-stage mode when either of the
output disable pins are in the logic high level.
The input disable allows the flip-flops to remain in their present states without having to disrupt the clock.
If either of the 2 input disables are taken to a logic high level, the Q outputs are fed back to the inputs,
forcing the flip-flops to remain in the same state. Clearing is enabled by taking the clear input to a logic
high level. The data outputs change state on the positive going edge of the clock.
Features
High Speed Operation: t
pd
(Clock to Q) = 14 ns typ (C
L
= 50 pF)
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: V
CC
= 2 to 6 V
Low Input Current: 1 μA max
Low Quiescent Supply Current: I
CC
(static) = 4 μA max (Ta = 25°C)
Function Table
Inputs
Data Enable
Clear
Clock
G
1
X
G
2
X
Data D
Output Q
H
X
X
L
L
L
X
X
X
Q
0
Q
0
L
H
X
X
L
X
H
X
Q
0
L
L
L
L
L
L
L
L
H
H
Note:
When either M or N (or both) is (are) high the output is disabled to the high-impedance state;
however sequential operation of the flip-flops is not affected.
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