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參數(shù)資料
| 型號(hào)： | HD74ALVCH16721 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 3.3-V 20-bit Flip Flops with 3-state Outputs(三態(tài)輸出的3.3V20位D觸發(fā)器) |
| 中文描述： | 3.3 V的20位字拖與三態(tài)輸出（三態(tài)輸出的3.3V20位?觸發(fā)器） |
| 文件頁(yè)數(shù)： | 1/12頁(yè) |
| 文件大小： | 52K |
| 代理商： | HD74ALVCH16721 |
HD74ALVCH16721
3.3-V 20-bit Flip Flops with 3-state Outputs
ADE-205-139B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH16721’s twenty flip flops are edge triggered D-type flip flops with qualified clock
storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs,
provided that the clock enable (
CLKEN
) input is low. If
CLKEN
is high, no data is stored. A buffered
output enable (
OE
) input can be used to place the twenty outputs in either a normal logic state (high or low
level) or a high impedance state. In the high impedance state, the outputs neither load nor drive the bus
lines significantly. The high impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components. The output enable (
OE
) input does not affect the internal
operation of the flip flops. Old data can be retained or new data can be entered while the outputs are in the
high impedance state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid
logic level.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
°
C)
High output current
±
24 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD74ALVCH16820 | 3.3-V 10-bit Flip Flops with Dual Outputs(雙輸出的3.3V10位D觸發(fā)器) |
| HD74ALVCH16821 | 3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs(三態(tài)輸出的3.3V20位總線接口D觸發(fā)器) |
| HD74ALVCH16825 | 18-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出的18位緩沖器/驅(qū)動(dòng)器) |
| HD74ALVCH16827 | 20-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出的20位緩沖器/驅(qū)動(dòng)器) |
| HD74ALVCH16830 | 1-bit to 2-bit Address Driver with 3-state Outputs(三態(tài)輸出1位-2位地址驅(qū)動(dòng)器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD74ALVCH16820 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:3.3-V 10-bit Flip Flops with Dual Outputs |
| HD74ALVCH16821 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:3.3-V 20-bit Bus Interface Flip Flops with 3-state Outputs |
| HD74ALVCH16825 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:18-bit Buffers / Drivers with 3-state Outputs |
| HD74ALVCH16827 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:20-bit Buffers / Drivers with 3-state Outputs |
| HD74ALVCH16830 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:1-bit to 2-bit Address Driver with 3-state Outputs |
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