參數(shù)資料
型號(hào): HD74ALVCH162827
廠商: Hitachi,Ltd.
英文描述: 20-bit Buffers / Drivers with 3-state Outputs(三態(tài)輸出20位緩沖器/驅(qū)動(dòng)器)
中文描述: 20位緩沖器/驅(qū)動(dòng)器,三態(tài)輸出(三態(tài)輸出20位緩沖器/驅(qū)動(dòng)器)
文件頁(yè)數(shù): 1/10頁(yè)
文件大?。?/td> 48K
代理商: HD74ALVCH162827
HD74ALVCH162827
20-bit Buffers / Drivers with 3-state Outputs
ADE-205-188B (Z)
3rd. Edition
December 1999
Description
The HD74ALVCH162827 is composed of two 10-bit sections with separate output enable signals. For
either 10-bit buffer section, the two output enable (1
OE1
and 1
OE2
or 2
OE1
and 2
OE2
) inputs must both
be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that
10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused
or floating data inputs at a valid logic level. All outputs, which are designed to sink up to 12 mA, include
26
resistors to reduce overshoot and undershoot.
Features
V
CC
= 2.3 V to 3.6 V
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
°
C)
High output current
±
12 mA (@V
CC
= 3.0 V)
Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
All outputs have equivalent 26
series resistors, so no external resistors are required.
相關(guān)PDF資料
PDF描述
HD74ALVCH162830 1-bit to 2-bit Address Driver with 3-state Outputs(三態(tài)輸出的1位-2位地址驅(qū)動(dòng)器)
HD74ALVCH162831 1-bit 4-bit Address Register / Driver with 3-state Outputs(三態(tài)輸出的1位-4位地址寄存器/驅(qū)動(dòng)器)
HD74ALVCH162835 18-bit Universal Bus Drivers with 3-state Outputs(三態(tài)輸出的18位通用總線驅(qū)動(dòng)器)
HD74ALVCH162836 20-bit Universal Bus Driver with 3-state Outputs(三態(tài)輸出的20位通用總線驅(qū)動(dòng)器)
HD74ALVCH16334 16-bit Universal Bus Driver with 3-state Outputs(三態(tài)輸出的16位通用總線驅(qū)動(dòng)器)
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參數(shù)描述
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