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參數(shù)資料
| 型號(hào)： | HD74ALVC16834 |
| 廠(chǎng)商： | Hitachi,Ltd. |
| 英文描述： | 18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable |
| 中文描述： | 18位通用總線(xiàn)驅(qū)動(dòng)器，三態(tài)輸出和反向鎖存使能 |
| 文件頁(yè)數(shù)： | 1/15頁(yè) |
| 文件大小： | 59K |
| 代理商： | HD74ALVC16834 |
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HD74ALVC16834
18-bit Universal Bus Driver with 3-state Outputs
and Inverted Latch Enable
ADE-205-216D (Z)
5th. Edition
December 1999
Description
The HD74ALVC16834 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V V
CC
operation.
Data flow from A to Y is controlled by output enable (
OE
). The device operates in the transparent mode
when the latch enable (
LE
) input is low. The A data is latched if the clock (CLK) input is held at a high or
low logic level. If
LE
is high, the A data is stored in the latch/flip flop on the low to high transition of the
CLK. When
OE
is high, the outputs are in the high impedance state.
To ensure the high impedance state during power up or power down,
OE
should be tied to V
CC
through a
pullup registor; the minimum value of the registor is determined by the current sinking capability of the
driver.
Features
Meets “PC SDRAM registered DIMM design support document, Rev. 1.2”
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25
°
C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25
°
C)
High output current
±
24 mA (@V
CC
= 3.0 V)
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|---|---|
| HD74ALVC16835 | 制造商:HITACHI 制造商全稱(chēng):Hitachi Semiconductor 功能描述:18-bit Universal Bus Driver with 3-state Outputs |
| HD74ALVC16835TE | 制造商:Renesas Electronics Corporation 功能描述:BUS XCVR SGL 18CH 3-ST 56TSSOP - Tape and Reel |
| HD74ALVC16835TEL | 制造商:RENESAS 制造商全稱(chēng):Renesas Technology Corp 功能描述:18-bit Universal Bus Driver with 3-state Outputs |
| HD74ALVC16836 | 制造商:HITACHI 制造商全稱(chēng):Hitachi Semiconductor 功能描述:20-bit Universal Bus Driver with 3-state Outputs |
| HD74ALVC1G00 | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述: |
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