參數(shù)資料
型號: HD74ACT283
廠商: Hitachi,Ltd.
英文描述: 3-Line To 8-Line Decoders/Demultiplexers 16-CDIP -55 to 125
中文描述: 4位二進制全加器的快速卡里
文件頁數(shù): 3/12頁
文件大?。?/td> 63K
代理商: HD74ACT283
HD74AC283/HD74ACT283
3
stage. Figure d shows a method of implementing a 5-input encoder, where the inputs are equally weighted.
The outputs S
0
, S
1
and S
2
present a binary number equal to the number of inputs I
1
– I
5
that are true. Figure
e shows one method of implementing a 5-input majority gate. When three or more of the inputs I
1
– I
5
are
true, the output M
5
is true.
Fig. a Active HIGH varsus Active LOW Interpretation
C
0
L
A
0
L
A
1
H
A
2
L
A
3
H
B
0
H
B
1
L
B
2
L
B
3
H
S
0
H
S
1
H
S
2
L
S
3
L
C
4
H
Logic levels
Active HIGH
0
0
1
0
1
1
0
0
1
1
1
0
0
1
Active LOW
Active HIGH: 0 + 10 + 9 = 3 + 16
Active LOW: 1 + 5 + 6 = 12 + 0
1
1
0
1
0
0
1
1
0
0
0
1
1
0
C
0
C
3
L
C
4
A
0
S
0
S
1
S
2
S
3
A
1
A
2
A
3
B
1
B
2
B
3
B
0
Fig. b 3-bit Adder
C
0
C
0
C
4
C
11
A
0
S
0
S
1
S
2
S
3
S
0
S
1
C
2
S
10
A
1
A
2
A
3
B
1
B
2
C
10
B
3
B
0
A
0
A
1
A
10
B
1
B
10
B
0
Fig. c 2-bit and 1-bit adders
相關PDF資料
PDF描述
HD74AC32 Octal Buffers And Drivers With 3-State Outputs 20-LCCC -55 to 125
HD74AC365 Octal Buffers And Drivers With 3-State Outputs 20-CDIP -55 to 125
HD74ACT365 3-Line To 8-Line Decoders/Demultiplexers 16-CFP -55 to 125
HD74AC366 Hex Inverter Buffer with 3-State Output
HD74ACT366 Dual 2-Line To 4-Line Decoders/Demultiplexers 20-LCCC -55 to 125
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