參數(shù)資料
型號(hào): HD66766R
廠商: Hitachi,Ltd.
英文描述: 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors
中文描述: 132 × 176點(diǎn)圖形LCD控制器/驅(qū)動(dòng)器的65K色
文件頁(yè)數(shù): 85/97頁(yè)
文件大?。?/td> 681K
代理商: HD66766R
HD66766R Rev. 1.0-1 / September 2002
85
Clock Synchronized Serial Interface Timing Characteristics
Table 53 (Vcc = 2.2 to 2.4 V)
Item
Symbol
Unit
Test Condition
Min
Typ
Max
Write
(received)
Read
(transmitted)
Write
(received)
Read
(transmitted)
Write
(received)
Read
(transmitted)
t
SCYC
us
Figure 3
0.1
20
Serial clock cycle time
t
SCYC
us
Figure 3
0.25
20
t
SCH
ns
Figure 3
40
Serial clock high-level pulse width
t
SCH
ns
Figure 3
120
t
SCL
ns
Figure 3
40
Serial clock low-level pulse width
t
SCL
ns
Figure 3
120
Serial clock rise/fall time
Chip select set up time
Chip select hold time
Serial input data set up time
Serial input data hold time
Serial input data delay time
Serial input data hold time
t
scr, scf
t
CSU
t
CH
t
SISU
t
SIH
t
SOD
t
SOH
ns
ns
ns
ns
ns
ns
ns
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
20
60
30
30
5
20
130
Table 54 (Vcc = 2.4 to 3.6 V)
Item
Symbol
t
SCYC
Unit
us
Test Condition
Figure 3
Min
0.076
Typ
Max
20
Write
(received)
Read
(transmitted)
Write
(received)
Read
(transmitted)
Write
(received)
Read
(transmitted)
Serial clock cycle time
t
SCYC
us
Figure 3
0.15
20
t
SCH
ns
Figure 3
40
Serial clock high-level pulse width
t
SCH
ns
Figure 3
70
t
SCL
ns
Figure 3
35
Serial clock low-level pulse width
t
SCL
ns
Figure 3
70
Serial clock rise/fall time
Chip select set up time
Chip select hold time
Serial input data set up time
Serial input data hold time
Serial output data delay time
Serial output data hold time
t
scr, scf
t
CSU
t
CH
t
SISU
t
SIH
t
SOD
t
SOH
ns
ns
ns
ns
ns
ns
ns
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
20
60
30
30
5
20
130
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