參數(shù)資料
型號： HD66740WTB0
廠商： Hitachi,Ltd.
英文描述： 112 x 80-dot Graphics LCD Controller/Driver
中文描述： 112 × 80點(diǎn)圖形LCD控制器/驅(qū)動器
文件頁數(shù)： 40/95頁
文件大小： 856K
代理商： HD66740WTB0
HD66740
40
a) Basic data-receive timing through the I2C bus interface
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
SCL
(input)
SDA
(input/
output)
"0" "1" "1" "1" "0"
"0"
ID
RS
Ack D7 D6 D5 D4 D3 D2 D1 D0 Ack
Transfer start
Transfer end
RS RW
Device ID code
Acknowledge
Acknowledge
Start byte
Instruction / RAM data
b) Consecutive data-receive timing through the I2C bus interface
1 2 3 4 5 6 7 8 910 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
SCL
SDA
Transfer start
Transfer end
28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
Start byte
Instruction or
RAM write
Instruction or
RAM write
Instruction or
RAM write
Instruction or
RAM write
A
A
A
A
A
P
S
Instruction / RAM
write execution.
Instruction / RAM
write execution.
Instruction / RAM
write execution.
Instruction / RAM
write execution.
note:
- Start byte should be transfered just after start (S).
Figure 16-a I2C bus interface data-receive sequence
a) Basic data-send timing through the I2C bus interface
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18
SCL
(input)
SDA
(input/
output)
"0" "1" "1" "1" "0"
"1"
"1"
ID
Ack D7 D6 D5 D4 D3 D2 D1 D0 Ack
Transfer start
Transfer end
RS RW
Device ID code
Acknowledge
Acknowledge
Start byte
RAM read
b) Consecutive data-send timing through the I2C bus interface
SCL
SDA
Transfer start
Transfer end
Start byte
Dummy read
(1 byte)
RAM data read
RAM data read
RAM data read
A
A
A
A
A
P
S
note:
- Start byte should be transfered just after start (S).
Figure 16-b I2C bus interface data-send sequence
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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