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參數(shù)資料
| 型號： | HD66113T |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 120-Channel Common Driver Packaged in a Slim Tape Carrier Package(點陣圖形LCD120通道驅(qū)動器) |
| 中文描述： | 120頻道共同驅(qū)動器封裝在一個超薄磁帶載體封裝（點陣圖形LCD120通道驅(qū)動器） |
| 文件頁數(shù)： | 11/21頁 |
| 文件大小： | 65K |
| 代理商： | HD66113T |
HD66113T
11
AC Characteristics (V
CC
= 2.5V to 5.5V, GND = 0V, and T
a
= –30
°
C to +75
°
C, unless otherwise
stated)
Item
Symbol
Pins
Min
Max
Unit
Notes
Clock cycle time
t
CYC
t
CWH
t
CWL
t
r
t
f
t
DS
t
DH
t
DD
t
M
t
pd1
t
pd2
CL
400
—
ns
Clock high-level width
CL
30
—
ns
Clock low-level width
CL
370
—
ns
Clock rise time
CL
—
30
ns
1
Clock fall time
CL
—
30
ns
1
Data setup time
DI, DIO1, DIO2, CL
100
—
ns
Data hold time
DI, DIO1, DIO2, CL
30
—
ns
Data output delay time
DIO1, DIO2, CL
—
350
ns
2
M phase difference
M, CL
–300
300
ns
Output delay time 1
X (n), CL
—
1.2
μ
s
μ
s
3
Output delay time 2
X (n), M
—
1.2
3
AC Characteristics (V
CC
= 5.0 V
±
10%, GND = 0 V, and T
a
= –30
°
C to +75
°
C, unless otherwise
stated)
Item
Symbol
Pins
Min
Max
Unit
Notes
Clock cycle time
t
CYC
t
CWH
t
CWL
t
r
t
f
t
DS
t
DH
t
DD
t
M
t
pd1
t
pd2
CL
400
—
ns
Clock high-level width
CL
30
—
ns
Clock low-level width
CL
370
—
ns
Clock rise time
CL
—
30
ns
1
Clock fall time
CL
—
30
ns
1
Data setup time
DI, DIO1, DIO2, CL
100
—
ns
Data hold time
DI, DIO1, DIO2, CL
30
—
ns
Data output delay time
DIO1, DIO2, CL
—
150
ns
2
M phase difference
M, CL
–300
300
ns
Output delay time 1
X (n), CL
—
0.7
μ
s
μ
s
3
Output delay time 2
Notes: 1. t
r
, t
f
< (t
cyc
– t
CWH
– t
CWL
)/2 and t
r
, t
f
≤
30 ns
2, 3 The load circuit shown in Figure 6 is connected.
X (n), M
—
0.7
3
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| HD66113TA0 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(120-Channel Common Driver Packaged in a Slim Tape Carrier Package) |
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| HD66120T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD Display Driver |
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