ii
Section 3 MCU Operating Modes and Address Space
.............................................. 63
3.1
Overview............................................................................................................................ 63
3.1.1
Mode Selection.....................................................................................................
3.1.2
Mode and System Control Registers .................................................................... 63
3.2
System Control Register (SYSCR).................................................................................... 64
3.3
Mode Control Register (MDCR) .......................................................................................
3.4
Address Space Map in Each Operating Mode...................................................................
63
66
66
Section 4 Exception Handling
.......................................................................................... 71
4.1
Overview............................................................................................................................ 71
4.2
Reset...................................................................................................................................
4.2.1
Overview...............................................................................................................
4.2.2
Reset Sequence.....................................................................................................
4.2.3
Disabling of Interrupts after Reset........................................................................ 74
4.3
Interrupts............................................................................................................................ 74
4.3.1
Overview...............................................................................................................
4.3.2
Interrupt-Related Registers...................................................................................
4.3.3
External Interrupts................................................................................................ 80
4.3.4
Internal Interrupts.................................................................................................. 80
4.3.5
Interrupt Handling ................................................................................................ 81
4.3.6
Interrupt Response Time.......................................................................................
4.3.7
Precaution .............................................................................................................
4.4
Note on Stack Handling.....................................................................................................
71
71
71
74
76
86
86
Section 5 Wait-State Controller
.......................................................................................
5.1
Overview............................................................................................................................ 89
5.1.1
Features.................................................................................................................
5.1.2
Block Diagram...................................................................................................... 89
5.1.3
Input/Output Pins.................................................................................................. 90
5.1.4
Register Configuration.......................................................................................... 90
5.2
Register Description...........................................................................................................
5.2.1
Wait-State Control Register (WSCR)...................................................................
5.3
Wait Modes........................................................................................................................ 92
89
89
90
90
Section 6 Clock Pulse Generator
.....................................................................................
6.1
Overview............................................................................................................................ 95
6.1.1
Block Diagram...................................................................................................... 95
6.1.2
Wait-State Control Register (WSCR)...................................................................
6.2
Oscillator Circuit................................................................................................................ 97
6.2.1
Oscillator (Generic Device).................................................................................. 97
6.2.2
Oscillator Circuit (H8/3337SF)............................................................................ 101
6.3
Duty Adjustment Circuit.................................................................................................... 105
6.4
Prescaler............................................................................................................................. 105
95
96