92
4.5
Note on Oscillators
Oscillator characteristics are closely related to board design and should be carefully evaluated by
the user in mask ROM and ZTAT versions, referring to the examples shown in this section.
Oscillator circuit constants will differ depending on the oscillator element, stray capacitance in its
interconnecting circuit, and other factors. Suitable constants should be determined in consultation
with the oscillator element manufacturer. Design the circuit so that the oscillator element never
receives voltages exceeding its maximum rating.
4.5.1
Definition of Oscillation Settling Standby Time
Figure 4-11 shows the oscillation waveform (OSC2), system clock (), and microcomputer
operating mode when a transition is made from standby mode, watch mode, or subactive mode, to
active (high-speed/medium-speed) mode, with an oscillator element connected to the system clock
oscillator.
As shown in figure 4-11, as the system clock oscillator is halted in standby mode, watch mode,
and subactive mode, when a transition is made to active (high-speed/medium-speed) mode, the
sum of the following two times (oscillation settling time and standby time) is required.
1. Oscillation settling time (t
rc
)
The time from the point at which the system clock oscillator oscillation waveform starts to change
when an interrupt is generated, until the amplitude of the oscillation waveform increases and the
oscillation frequency stabilizes.
2. Standby time
The time required for the CPU and peripheral functions to begin operating after the oscillation
waveform frequency and system clock have stabilized.
The standby time setting is selected with standby timer select bits 2 to 0 (STS2 to STS0) (bits 6 to
4 in system control register 1 (SYSCR1)).