ii
Section 3
3.1
MCU Operating Modes and Address Space
...........................................
Overview............................................................................................................................ 57
3.1.1
Mode Selection.....................................................................................................
3.1.2
Mode and System Control Registers.................................................................... 57
System Control Register (SYSCR).................................................................................... 58
Mode Control Register (MDCR) .......................................................................................
Address Space Map in Each Operating Mode...................................................................
57
57
3.2
3.3
3.4
60
61
Section 4
4.1
4.2
Exception Handling
........................................................................................ 65
Overview............................................................................................................................ 65
Reset...................................................................................................................................
4.2.1
Overview...............................................................................................................
4.2.2
Reset Sequence.....................................................................................................
4.2.3
Disabling of Interrupts after Reset........................................................................ 68
Interrupts............................................................................................................................ 68
4.3.1
Overview...............................................................................................................
4.3.2
Interrupt-Related Registers...................................................................................
4.3.3
External Interrupts................................................................................................ 74
4.3.4
Internal Interrupts.................................................................................................. 74
4.3.5
Interrupt Handling ................................................................................................ 75
4.3.6
Interrupt Response Time.......................................................................................
4.3.7
Precaution .............................................................................................................
Note on Stack Handling.....................................................................................................
65
65
65
4.3
68
70
80
81
82
4.4
Section 5
5.1
Wait-State Controller
.....................................................................................
Overview............................................................................................................................ 83
5.1.1
Features.................................................................................................................
5.1.2
Block Diagram...................................................................................................... 83
5.1.3
Input/Output Pins.................................................................................................. 84
5.1.4
Register Configuration.......................................................................................... 84
Register Description...........................................................................................................
5.2.1
Wait-State Control Register (WSCR)...................................................................
Wait Modes........................................................................................................................ 86
83
83
5.2
84
84
5.3
Section 6
6.1
Clock Pulse Generator
...................................................................................
Overview............................................................................................................................ 89
6.1.1
Block Diagram...................................................................................................... 89
6.1.2
Wait-State Control Register (WSCR)...................................................................
Oscillator Circuit................................................................................................................ 91
6.2.1
Oscillator (Generic Device).................................................................................. 91
6.2.2
Oscillator Circuit (H8/3437S)...............................................................................
Duty Adjustment Circuit....................................................................................................
Prescaler.............................................................................................................................
89
90
6.2
95
99
99
6.3
6.4