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iv
Section 8
16-Bit Free-Running Timer ......................................................................... 157
8.1
Overview............................................................................................................................ 157
8.1.1
Features ................................................................................................................. 157
8.1.2
Block Diagram...................................................................................................... 158
8.1.3
Input and Output Pins ........................................................................................... 159
8.1.4
Register Configuration.......................................................................................... 160
8.2
Register Descriptions ......................................................................................................... 161
8.2.1
Free-Running Counter (FRC) ............................................................................... 161
8.2.2
Output Compare Registers A and B (OCRA and OCRB).................................... 161
8.2.3
Input Capture Registers A to D (ICRA to ICRD)................................................. 162
8.2.4
Timer Interrupt Enable Register (TIER)............................................................... 164
8.2.5
Timer Control/Status Register (TCSR)................................................................. 166
8.2.6
Timer Control Register (TCR).............................................................................. 168
8.2.7
Timer Output Compare Control Register (TOCR) ............................................... 170
8.3
CPU Interface..................................................................................................................... 172
8.4
Operation............................................................................................................................ 175
8.4.1
FRC Increment Timing ......................................................................................... 175
8.4.2
Output Compare Timing ....................................................................................... 177
8.4.3
FRC Clear Timing ................................................................................................ 178
8.4.4
Input Capture Timing............................................................................................ 178
8.4.5
Timing of Input Capture Flag (ICF) Setting ......................................................... 181
8.4.6
Setting of Output Compare Flags A and B (OCFA and OCFB) .......................... 181
8.4.7
Setting of Timer Overflow Flag (OVF)................................................................ 182
8.5
Interrupts ............................................................................................................................ 183
8.6
Sample Application............................................................................................................ 184
8.7
Application Notes .............................................................................................................. 185
Section 9
8-Bit Timers...................................................................................................... 191
9.1
Overview............................................................................................................................ 191
9.1.1
Features ................................................................................................................. 191
9.1.2
Block Diagram...................................................................................................... 192
9.1.3
Input and Output Pins ........................................................................................... 193
9.1.4
Register Configuration.......................................................................................... 193
9.2
Register Descriptions ......................................................................................................... 194
9.2.1
Timer Counter (TCNT)......................................................................................... 194
9.2.2
Time Constant Registers A and B (TCORA and TCORB) .................................. 194
9.2.3
Timer Control Register (TCR).............................................................................. 195
9.2.4
Timer Control/Status Register (TCSR) ................................................................ 198
9.2.5
Serial/Timer Control Register (STCR) ................................................................. 200
9.3
Operation............................................................................................................................ 201
9.3.1
TCNT Increment Timing ...................................................................................... 201
9.3.2
Compare-Match Timing........................................................................................ 203
9.3.3
External Reset of TCNT ....................................................................................... 205