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Hitachi Embedded Workshop User Manual
154
2.11
Calculation of the Number of Instruction Execution Cycles
The simulator/debugger calculates the number of instruction execution cycles by using the expression, the data-
bus width of the memory map, and the number of access cycles, which is described in the H8S, H8/300 Series
Programming Manual. However, note that the number of instruction execution cycles may differ when the
number of instruction execution cycles that is calculated on the simulator/debugger and the one that the program
is executed on the system.
MOVFPE and MOVTPE Instructions: The number of cycles for transferring data of the E-clock
synchronization instruction is the value between 9 to 16. The simulator/debugger calculates as ’11 + number of
operand access cycles’. The number of operand access cycles can be calculated from the data bus width of the
memory and the number of access cycles.
EEPMOV Instruction: The number of cycles for the EEPROM-write instruction is the sum of the number of
cycles for reading instructions and cycles for transferring data.
SLEEP Instruction: The simulator/debugger does not add the number of cycles considering the case when the
SLEEP instruction is used for halting program.
Standard I/O and file I/O processing: The standard I/O and file I/O processing are specific functions for the
simulator/debugger, and they are not added to the number of cycles. Note that the standard I/O and file I/O
processing are the period while the branch to the position specified with the system-call address of the BSR and
JSR instructions is completed to return to the called source after the I/O processing.