HD61604/HD61605
1276
Writing Data into HD61604 Display RAM:
Data is written into the display RAM in the following five
methods:
1. Bit manipulation
Data is written into any bit of RAM on a bit basis.
2. Static display mode
8-bit data is written on a digit basis according to the 7-segment type LCD pattern of static drive.
3. 1/2 duty cycle display mode
8-bit data is written on a digit basis according to the 7-segment type LCD pattern of 1/2 duty cycle
drive.
4. 1/3 duty cycle display mode
8-bit data is written on a digit basis according to the 7-segment type LCD pattern of 1/3 duty cycle
drive.
5. 1/4 duty cycle display mode
8-bit data is written on a digit basis according to the 7-segment type LCD pattern of 1/4 duty cycle
drive.
The RAM area and the allocation of the segment data for 1-digit display depend on the drive methods as
described in the section of “Reading Data from Display RAM”.
8-bit data is written on a digit basis corresponding to the above duty cycle driving methods. The digits are
allocated as shown in Figure 8. As the data can be transferred on a digit basis from a microprocessor,
transfer efficiency is improved by allocating the LCD pattern according to the allocation of each bit data
of the digit in the data RAM.
Figure 8 shows the digit address (displayed as Adn) to specify the store address of the transferred 8-bit
data on a digit basis.
Figure 9 shows the correspondence between each segment in an Adn and the 8-bit input data.
When data is transferred on a digit basis 8-bit display data and digit address should be specified as
described above.
However, when the digit address is Ad6 of static, Ad12 of 1/2 duty cycle, or Ad25 for 1/4 duty cycle,
display RAM does not have enough bits for the data. Thus the extra bits of the input 8-bit data are
ignored.
In bit manipulation, any one bit of display RAM can be written. When data is transferred on a bit basis,
1-bit display data, a segment address (6 bits) and a common address (2 bits) should be specified.