參數(shù)資料
型號: HD49319F
廠商: Hitachi,Ltd.
英文描述: CMOS 9-Bit A/D Converter(CMOS 9位A/D轉(zhuǎn)換器)
中文描述: 的CMOS 9位A / D轉(zhuǎn)換器的CMOS(9位的A / D轉(zhuǎn)換器)
文件頁數(shù): 8/11頁
文件大?。?/td> 70K
代理商: HD49319F
HD49319F
8
Cautionary Items
Power Supply Current
When the internal op-amp is used, the current which drives the reference resistors is added to the power
supply current.
Sleep Mode
When the SLPB pin input signal is low, the chip enters sleep mode. This allows the IC's power supply
current to be held to almost zero.
During sleep mode, the internal circuits are stopped and the digital outputs are undefined (either high or
low).
During sleep mode using the internal op-amp, the internal op-amp is also stopped and the reference voltage
is not applied to the reference resistors for saving the power supply current.
After clearing sleep mode by setting the SLPB input high, input at least 5 clock cycles to restore the chip to
normal operation. When the internal op-amp is used, input at least 5 clock cycles after the reference
voltage was restored.
Vin ( DC : settlement )
EXT CLK
Digital output
(D0 to D9)
M
Code of M:0 to 510
M+1
M
M+1
M
This IC has the characteristics such that digital data charge 1 LSB (2 LSB max.) at everyclock pulse for
each level of DC input data. Be careful this could be a problem in some cases.
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