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參數(shù)資料
| 型號： | HD40C4384 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | Low-Voltage AS Microcomputers with On-Chip A/D Converter(帶片上A/D轉(zhuǎn)換器的低壓微計算機) |
| 中文描述： | 低電壓如同在微機芯片的A / D轉(zhuǎn)換器（帶片上的A / D轉(zhuǎn)換器的低壓微計算機） |
| 文件頁數(shù)： | 50/162頁 |
| 文件大小： | 482K |
| 代理商： | HD40C4384 |
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HD404374/HD404384/HD404389/HD404082/HD404084 Series
50
The MCU is switched to watch mode by executing a STOP instruction while TMA3 = 1 in active mode, or
by executing a STOP/SBY instruction in subactive mode.
Watch mode is cleared by
RESET
input or an
INT
0
,timer A or
WU
0
interrupt request. For
RESET
input,
refer to the section on stop mode. When watch mode is cleared by an
INT
0
, timer A or
WU
0
interrupt
request, the mode transition depends on the value of the LSON bit: the MCU enters active mode if LSON =
0, and enters subactive mode if LSON = 1. In the case of a transition to active mode, interrupt request
generation is delayed to secure the oscillation settling time: the delay is the tRC set time for the timer A
interrupt, and, for the
INT
0
interrupt or
WU
0
interrupt, Tx (T + t
RC
< Tx < 2T + t
RC
) if bit 1 and 0 (MIS1,
MIS0) of the miscellaneous register are set to 00, or Tx (t
RC
< Tx < T + t
RC
) if MIS1 and MIS0 are set to 01
or 10 (figures 14 and 15). Other operations when the transition is made are the same as when watch mode
is cleared (figure 12).
Subactive mode ( Applies to HD404374 Series):
In subactive mode, the OSC
1
and OSC
2
oscillator circuits stop and the MCU operates on clocks generated
by the X1 and X2 oscillator circuits. In this mode, functions other than the A/D converter operate, but
since the operating clocks are slow, power consumption is the lowest after watch mode.
A CPU instruction processing speed of 244
μ
s or 122
μ
s can be selected according to whether bit 2 (SSR2)
of the system clock select register (SSR: $004) is set to 1 or cleared to 0. The value of the SSR2 bit should
be changed (0
→
1 or 1
→
0) only in active mode. If the value is changed in subactive mode, the MCU may
operate incorrectly.
Subactive mode is cleared by executing a STOP/SBY instruction. A transition is then made to either watch
mode or active mode according to the value of the low speed on flag (LSON: $020,0) and the direct
transfer on flag (DTON: $020,3).
Subactive mode is a function option, and should be specified in the function option list.
Interrupt frame ( Applies to HD404374 Series):
In watch mode and subactive mode,
CLK
is supplied to the timer A,
WU
0
, and
INT
0
acceptance circuits.
Prescaler W and timer A operate as time bases, and generate interrupt frame timing. Either of two values
can be selected for the interrupt frame period, T, by means of the miscellaneous register (MIS: $005)
(figure 15).
In watch mode and subactive mode, the timing for generation of timer A,
INT
0
and
WU
0
interrupts is
synchronized with the interrupt frame. Except for the case of an active mode transition, the interrupt strobe
timing is used for interrupt request generation. Timer A generates overflow and interrupt requests at the
interrupt strobe timing.
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