參數(shù)資料
型號(hào): HD407A4669
廠商: Hitachi,Ltd.
英文描述: Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit(帶雙音多頻電路的低電壓微計(jì)算機(jī))
中文描述: 低電壓如同在微機(jī)芯片的DTMF產(chǎn)生電路(帶雙音多頻電路的低電壓微計(jì)算機(jī))
文件頁(yè)數(shù): 55/142頁(yè)
文件大小: 894K
代理商: HD407A4669
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HD404669 Series
55
Pull-up and Pull-down MOS Transistor Control
The D
4
, D
5
, D
9
to D
11
, and the R port pins have built-in pull-up MOS transistors that can be controlled by
software, and the D
0
to D
3
pins have built-in pull-down MOS transistors that can be controlled by software.
The on/off status of all these transistors is controlled by bit 3 (MIS3) of the miscellaneous register (MIS:
$00C), and the on/off status of an individual transistor can also be controlled by the port data register
(PDR) of the corresponding pin—enabling on/off control of that pin alone (tables 14, 15 and figure 37).
The on/off status of each transistor and the peripheral function mode of each pin can be set independently.
Bit
Initial value
Read/Write
Bit name
3
0
W
MIS3
2
0
W
MIS2
0
0
W
MIS0
1
0
W
MIS1
MIS2
CMOS buffer
on/off selection
for pin R4
3
/SO
1
Active
Miscellaneous register (MIS: $00C)
0
1
Off
Refer to figure 18 in the
operation modes section.
t
RC
selection.
MIS3
0
1
Pull-up/Pull-down
MOS transistor
control
Off
Active
MIS0
Figure 37 Miscellaneous Register (MIS)
How to Deal with Unused I/O Pins:
I/O pins that are not needed by the user system (floating) must be
connected to V
CC
to prevent LSI malfunctions due to noise. These pins must either be pulled up to V
CC
by
their pull-up MOS transistors or by resistors of about 100 k
. Pins provided with pull-down MOS should
be pulled down to GND potential with the built-in pull-down MOS or connected to GND.
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