
HD404889/HD404899/HD404878/HD404868 Series
71
Data control registers
Note:
*
Applies to HD404889, HD404899, and HD404878 Series
(DCD0–2 : $030–$032)
(DCR0–8 : $034–$03C)
Register Name
DCD0–DCD2
DCR0–DCR8
Bit
Read/Write
Reset
Bit name
Read/Write
Reset
Bit name
3
W
0
DCD03–DCD23
W
0
DCR03–DCR73
2
W
0
DCD02–DCD22
W
0
DCR02–DCR72
1
W
0
DCD01–DCD21
W
0
DCR01–DCR81
0
W
0
DCD00–DCD20
W
0
DCR00–DCR80
All bits
0
1
CMOS buffer off (high impedance)
CMOS buffer active
CMOS buffer control
Register Name
DCD0
DCD1
DCD2
DCR0
DCR1
DCR2
DCR3
DCR4
DCR5
DCR6
DCR7
DCR8
Bit 3
D
3
D
7
D
11
*
R0
3
*
R1
3
R2
3
R3
3
R4
3
R5
3
R6
3
R7
3
Bit 2
D
2
D
6
D
10
*
R0
2
R1
2
R2
2
R3
2
R4
2
R5
2
R6
2
R7
2
Bit 1
D
1
D
5
D
9
R0
1
R1
1
R2
1
R3
1
R4
1
R5
1
R6
1
R7
1
R8
1
*
Bit 0
D
0
D
4
D
8
R0
0
R1
0
R2
0
R3
0
R4
0
R5
0
R6
0
R7
0
R8
0
*
Correspondence between each bit of DCD and DCR and ports
Figure 27 Data Control Registers (DCD, DCR)