參數(shù)資料
型號: HD404848FS
廠商: Hitachi,Ltd.
英文描述: 4-Bit Single-Chip Microcomputer
中文描述: 4位單片機(jī)
文件頁數(shù): 88/125頁
文件大小: 471K
代理商: HD404848FS
HD404849 Series
88
Bit
Initial value
Read/Write
Bit name
3
0
W
SMRA3
2
0
W
SMRA2
0
0
W
SMRA0
1
0
W
SMRA1
Serial mode register A (SMRA: $005)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
SMRA2
SMRA0
SMRA1
SMRA3
0
1
R2
1
/SCK
mode selection
R2
1
SCK
Output
Output
Input
Clock source
Prescaler
division ratio
Refer to
table 29
SCK
Prescaler
System clock
External clock
Figure 70 Serial Mode Register A (SMRA)
Serial Mode Register B (SMRB: $028):
This register has the following functions (figure 71).
Prescaler division ratio selection
Output level control in idle states
Serial mode register B (SMRB: $028) is a 2-bit write-only register. It cannot be written during data
transfer.
By setting bit 0 (SMRB0) of this register, the prescaler division ratio is selected. Only bit 0 (SMRB0) can
be reset to 0 by MCU reset. Bit 1 (SMRB1) is used to control the output level of the SO pin in idle states.
The output level changes at the same time that SMRB1 is written to.
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