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參數(shù)資料
| 型號： | HD404848 |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 4-Bit Single-Chip Microcomputer |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 60/125頁 |
| 文件大?。?/td> | 471K |
| 代理商： | HD404848 |
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HD404849 Series
60
Timer B Operations:
Free-running/reload timer operation: The free-running/reload operation, input clock source, and
prescaler division ratio are selected by timer mode register B1 (TMB1: $009).
Timer B is initialized to the value set in timer write register B (TWBL: $00A, TWBU: $00B) by
software and incremented by one at each clock input. If an input clock is applied to timer B after it has
reached $FF, an overflow is generated. In this case, if the reload timer function is enabled, timer B is
initialized to its initial value set in timer write register B; if the free-running timer function is enabled,
the timer is initialized to $00 and then incremented again.
The overflow sets the timer B interrupt request flag (IFTB: $002, bit 0). IFTB is reset by software or
MCU reset. Refer to figure 3 and table 1 for details.
External event counter operation: Timer B is used as an external event counter by selecting external
event input as the input clock source. In this case, pin R1
3
/
EVNB
must be set to
EVNB
by port mode
register C (PMRC: $025).
Timer B is incremented by one at each falling edge of signals input to pin
EVNB
. The other operations
are basically the same as the free-running/reload timer operation.
Timer output operation: The following three output modes can be selected for timer B by setting timer
mode register B2 (TMB2: $013).
Toggle
0 output
1 output
By selecting the timer output mode, pin R1
0
/TOB is set to TOB. The output from TOB is reset low by
MCU reset.
Toggle output: When toggle output mode is selected, the output level is inverted if a clock is input
after timer B has reached $FF. By using this function and reload timer function, clock signals can
be output at a required frequency for the buzzer. The output waveform is shown in figure 43 (1).
0 output: When 0 output mode is selected, the output level is pulled low if a clock is input after
timer B has reached $FF. Note that this function must be used only when the output level is high.
1 output: When 1 output mode is selected, the output level is set high if a clock is input after timer
B has reached $FF. Note that this function must be used only when the output level is low.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HD404848FS | 4-Bit Single-Chip Microcomputer |
| HD404848H | RELAY SOCKET |
| HD404848TF | PLASTIC-GRIP |
| HD404849 | TERMINAL |
| HD404849FS | TERMINAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HD404848FS | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer |
| HD404848H | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer |
| HD404848TF | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer |
| HD404849 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer |
| HD404849FS | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer |
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