參數(shù)資料
型號： HD4048412FS
廠商： Hitachi,Ltd.
英文描述： 4-Bit Single-Chip Microcomputer
中文描述： 4位單片機
文件頁數(shù)： 72/125頁
文件大?。?/td> 471K
代理商： HD4048412FS
HD404849 Series
72
Timer D Operations:
Free-running/reload timer operation: The free-running/reload operation, input clock source, and
prescaler division ratio are selected by timer mode register D1 (TMD1: $010).
Timer D is initialized to the value set in timer write register D (TWDL: $011, TWDU: $012) by
software and incremented by one at each clock input. If an input clock is applied to timer D after it has
reached $FF, an overflow is generated. In this case, if the reload timer function is enabled, timer D is
initialized to its initial value set in timer write register D; if the free-running timer function is enabled,
the timer is initialized to $00 and then incremented again.
The overflow sets the timer D interrupt request flag (IFTD: $003, bit 0). IFTD is reset by software or
MCU reset. Refer to figure 3 and table 1 for details.
External event counter operation: Timer D is used as an external event counter by selecting the
external event input as an input clock source. In this case, pin R2
0
/EVND must be set to EVND by port
mode register C (PMRC: $025).
Either falling or rising edge, or both falling and rising edges of input signals can be selected as the
external event detection edge by detection edge select register 2 (ESR2: $027). When both rising and
falling edges detection is selected, the time between the falling edge and rising edge of input signals
must be 2t
cyc
or longer.
Timer D is incremented by one at each detection edge selected by detection edge select register 2
(ESR2: $027). The other operations are basically the same as the free-running/reload timer operation.
Timer output operation: The following four output modes can be selected for timer D by setting timer
mode register D2 (TMD2: $015).
Toggle
0 output
1 output
PWM output
By selecting the timer output mode, pin R1
2
/TOD is set to TOD. The output from TOD is reset low by
MCU reset.
Toggle output: The operation is basically the same as that of timer-B’s toggle output.
0 output: The operation is basically the same as that of timer-B’s 0 output.
1 output: The operation is basically the same as that of timer-B’s 1 output.
PWM output: The operation is basically the same as that of timer-C’s PWM output.
Input capture timer operation: The input capture timer counts the clock cycles between trigger edges
input to pin EVND.
Either falling or rising edge, or both falling and rising edges of input signals can be selected as the
trigger input edge by detection edge select register 2 (ESR2: $027).
When a trigger edge is input to EVND, the count of timer D is written to timer read register D (TRDL:
$011, TRDU: $012), and the timer D interrupt request flag (IFTD: $003, bit 0) and the input capture
status flag (ICSF: $021, bit 0) are set. Timer D is reset to $00, and then incremented again. While
ICSF is set, if a trigger input edge is applied to timer D, or if timer D generates an overflow, the input
capture error flag (ICEF: $021, bit 1) is set. ICSF and ICEF are reset to 0 by MCU reset or by writing
0.
相關PDF資料
PDF描述
HD4048412H RELAY BASE
HD4048412TF 4-Bit Single-Chip Microcomputer
HD404848 4-Bit Single-Chip Microcomputer
HD404848FS 4-Bit Single-Chip Microcomputer
HD404848H RELAY SOCKET
相關代理商/技術參數(shù)
參數(shù)描述
HD4048412H 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD4048412TF 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-Bit Single-Chip Microcomputer
HD404848 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404848FS 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404848H 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
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