參數(shù)資料
型號(hào): HD4046212R
廠商: Hitachi,Ltd.
英文描述: AS Microcomputer Incorporating a DTMF Generator Circuit(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路)
中文描述: 由于微機(jī)安裝有雙音多頻發(fā)電機(jī)斷路器(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路)
文件頁(yè)數(shù): 84/155頁(yè)
文件大?。?/td> 549K
代理商: HD4046212R
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HD404629R Series
84
Serial Interface Operation
Selecting and Changing the Operating Mode:
Table 28 lists the serial interface’s operating modes. To
select an operating mode, use one of these combinations of port mode register A (PMRA: $004) and serial
mode register A (SMRA: $005) settings; to change the operating mode, always initialize the serial interface
internally by writing data to serial mode register A. Note that the serial interface is initialized by writing
data to serial mode register A. Refer to the following Serial Mode Register A section for details.
Pin Setting:
The R2
1
/
SCK
pin is controlled by writing data to serial mode register A (SMRA: $005). The
R2
2
/SI and R2
3
/SO pins are controlled by writing data to port mode register A (PMRA: $004). Refer to the
following Registers for Serial Interface section for details.
Transmit Clock Source Setting:
The transmit clock source is set by writing data to serial mode register A
(SMRA: $005) and serial mode register B (SMRB: $028). Refer to the following Registers for Serial
Interface section for details.
Data Setting:
Transmit data is set by writing data to the serial data register (SRL: $006, SRU: $007).
Receive data is obtained by reading the contents of the serial data register. The serial data is shifted by the
transmit clock and is input from or output to an external system.
The output level of the SO pin is invalid until the first data is output after MCU reset, or until the output
level control in idle states is performed.
Table 28 Serial Interface Operating Modes
SMRA
PMRA
Bit 3
Bit 1
Bit 0
Operating Mode
1
0
0
Continuous clock output mode
1
Transmit mode
1
0
Receive mode
1
Transmit/receive mode
Transfer Control:
The serial interface is activated by the STS instruction. The octal counter is reset to
000 by this instruction, and it increments at the rising edge of the transmit clock. When the eighth transmit
clock signal is input or when serial transmission/receive is discontinued, the octal counter is reset to 000,
the serial interrupt request flag (IFS: $023, bit 2) is set, and the transfer stops.
When the prescaler output is selected as the transmit clock, the transmit clock frequency is selected as 4t
cyc
to 8192t
cyc
by setting bits 2 to 0 (SMRA2– SMRA0) of serial mode register A (SMRA: $005) and bit 0
(SMRB0) of serial mode register B (SMRB: $028) as listed in table 29.
相關(guān)PDF資料
PDF描述
HD404628R AS Microcomputer Incorporating a DTMF Generator Circuit(微計(jì)算機(jī)帶雙音多頻發(fā)生器電路)
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