參數(shù)資料
型號(hào): HD404616TF
廠商: Hitachi,Ltd.
英文描述: 4-Bit Single-Chip Microcomputer
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 11/89頁(yè)
文件大小: 358K
代理商: HD404616TF
HD404618 Series
11
0
1
2
3
Bit 3
Bit 2
Bit 1
Bit 0
IM0
(IM of
INT
)
0
IF0
(IF of
INT
)
0
RSP
(Reset SP bit)
IE
(Interrupt enable flag)
IMTA
(IM of timer A)
IFTA
(IF of timer A)
IM1
(IM of
INT
)
1
IF1
(IF of
INT
)
1
IMTC
(IM of timer C)
IFTC
(IF of timer C)
IMTB
(IM of timer B)
IFTB
(IF of timer B)
Not used
Not used
IMS
(IM of serial)
IFS
(IF of serial)
$000
$001
$002
$003
32
35
DTON
Direct transfer on flag
TGSP
(Tone generator
speed flag)
WDON
(Watchdog on flag)
LSON
(Low speed on flag)
Not Used
$020
$021
$023
IF: Interrupt request flag
IM: Interrupt mask
IE: Interrupt enable flag
SP: Stack pointer
Note: Bits in the interrupt control bits area and register flag area are set by the SEM or SEMD
instruction, reset by the REM or REMD instruction, and tested by the TM or TMD instruction.
Other instructions have no effect.
Figure 3 Configuration of Interrupt Control Bits and Register Flag Areas
IF
RSP
WDON
TGSP
DTON
SEM/SEMD
Not executed
Not executed
Allowed
Allowed
REM/REMD
Allowed
Allowed
Not executed
Allowed
TM/TMD
Allowed
Inhibited
Inhibited
Inhibited
Not executed in active mode
Used in subactive mode
Allowed
Allowed
Note: WDON is always reset in active mode.
DTON is always reset in active mode.
If the TM or TMD instruction is executed for the inhibited bits or non-existing bits,
the value in ST becomes invalid.
Figure 4 Usage Limitations of RAM Bit Manipulation Instructions
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HD404618 4-Bit Single-Chip Microcomputer
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HD404618 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404618FS 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:4-Bit Single-Chip Microcomputer
HD404618H 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer
HD404618SERIES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
HD404618TF 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:4-Bit Single-Chip Microcomputer