HD404618 Series
53
Serial Data Register (SRL: $006, SRU: $007):
Eight-bit read/write register separated into upper and
lower digits located at sequential addresses.
Data in this register is output from the SO pin, LSB first, in synchronism with the falling edge of the
transmit clock, and data is input LSB first through the SI pin at the rising edge of the transmit clock.
Input/output timing is shown in figure 32.
Data cannot be read or written during serial data transmission. If a read/write occurs during transmission,
the accuracy of the resultant data cannot be guaranteed.
LSB
MSB
1
2
3
4
5
6
7
8
Transmit
clock
Serial
output
data
Serial input
data
latch timing
Figure 32 Serial Interface Timing
Selecting and Changing Operating Mode:
Table 26 lists the serial interface operating modes. To select
an operating mode, use one of these combinations of PMR and SMR settings; to change the operating
mode, always initialize the serial interface internally by writing to the SMR.
Table 26 Serial Interface Operating Modes
SMR
PMRA
Bit 3
Bit 1
Bit 0
Operating Mode
1
0
0
Continuous clock output mode
1
0
1
Transmit mode
1
1
0
Receive mode
1
1
1
Transmit/receive mode
Serial Interface Operation:
Three operating modes are provided for the serial interface; transitions
between them are shown in figure 33.
In STS waiting state, the serial interface is initialized and the transmit clock is ignored. If the STS
instruction is then executed, the serial interface enters transmit clock wait state.
In transmit clock wait state, input of the transmit clock increments the octal counter, shifts the serial clock
register, and activates serial transmission. However, note that if clock output mode is selected, the transmit
clock is continuously output but data is not transmitted.